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author | Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> | 2014-03-13 11:57:34 +0530 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2014-05-13 09:14:05 +0200 |
commit | 31081859855e606ca06131c3a14e099e043d39f0 (patch) | |
tree | eb9551a71c038d276720197c114fbebefc1127d6 /drivers/fpga | |
parent | a0735a34f8ab2d7060b6f8c16d3cccf78b137283 (diff) | |
download | u-boot-imx-31081859855e606ca06131c3a14e099e043d39f0.zip u-boot-imx-31081859855e606ca06131c3a14e099e043d39f0.tar.gz u-boot-imx-31081859855e606ca06131c3a14e099e043d39f0.tar.bz2 |
fpga: zynq: Use helper function zynq_validate_bitstream
Use helper function zynq_validate_bitstream so that the
code can be reused easily for different cases of dma transfer.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/fpga')
-rw-r--r-- | drivers/fpga/zynqpl.c | 32 |
1 files changed, 25 insertions, 7 deletions
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index ef6d1ca..c066f21 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -320,20 +320,20 @@ static u32 *zynq_align_dma_buffer(u32 *buf, u32 len, u32 swap) return buf; } -static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) +static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf, + size_t bsize, u32 blocksize, u32 *swap, + u32 *partialbit) { - unsigned long ts; /* Timestamp */ - u32 partialbit = 0; - u32 isr_status, swap, diff; u32 *buf_start; + u32 diff; /* Detect if we are going working with partial or full bitstream */ if (bsize != desc->size) { printf("%s: Working with partial bitstream\n", __func__); - partialbit = 1; + *partialbit = 1; } + buf_start = check_data((u8 *)buf, blocksize, swap); - buf_start = check_data((u8 *)buf, bsize, &swap); if (!buf_start) return FPGA_FAIL; @@ -351,7 +351,25 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) return FPGA_FAIL; } - if (zynq_dma_xfer_init(partialbit)) + if (zynq_dma_xfer_init(*partialbit)) + return FPGA_FAIL; + + return 0; +} + + +static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) +{ + unsigned long ts; /* Timestamp */ + u32 partialbit = 0; + u32 isr_status, swap; + + /* + * send bsize inplace of blocksize as it was not a bitstream + * in chunks + */ + if (zynq_validate_bitstream(desc, buf, bsize, bsize, &swap, + &partialbit)) return FPGA_FAIL; buf = zynq_align_dma_buffer((u32 *)buf, bsize, swap); |