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authorStefano Babic <sbabic@denx.de>2010-06-29 11:47:48 +0200
committerStefano Babic <sbabic@denx.de>2010-10-13 18:09:31 +0200
commit3b8ac464f25581a7d22b303a9154c05e0c7f40a8 (patch)
tree47f8c1789a5667ef0d31daed228b9b70386138ed /drivers/fpga/Makefile
parentf8f8acd7249d224ed5f9704a5738c469b137bc8e (diff)
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FPGA: add support for downloading Lattice bitstream
The patch adds support to load a Lattice's bitstream image (called VME file) into a Lattice FPGA. The code containing the state machine delivered as part of Lattice's ispVMtools is integrated. The FPGA is programmed using the JTAG interface. The board maintainer must provide accessors to drive the JTAG signals TCK, TMS, TDI and to get the value of the input signal TDO. Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'drivers/fpga/Makefile')
-rw-r--r--drivers/fpga/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 52d8e24..9ecdc5e 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
COBJS-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
COBJS-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
COBJS-$(CONFIG_FPGA_XILINX) += xilinx.o
+COBJS-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
ifdef CONFIG_FPGA_ALTERA
COBJS-y += altera.o
COBJS-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o