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authorPeter Tyser <ptyser@xes-inc.com>2009-06-30 17:15:41 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-07-01 23:01:55 -0500
commit9c06071a6077ba95e9d43226156e39567d5d064a (patch)
treee9c0ac3c27d1d95abe14152def478794fe2d2ac1 /drivers/dma/fsl_dma.c
parent017f11f68ef543e866be033bcb7b8058a8a380d8 (diff)
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fsl_dma: Add bitfield definitions for common registers
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'drivers/dma/fsl_dma.c')
-rw-r--r--drivers/dma/fsl_dma.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c
index a9989ee..baf2942 100644
--- a/drivers/dma/fsl_dma.c
+++ b/drivers/dma/fsl_dma.c
@@ -51,11 +51,11 @@ static uint dma_check(void) {
volatile uint status = dma->sr;
/* While the channel is busy, spin */
- while (status & 4)
+ while (status & FSL_DMA_SR_CB)
status = dma->sr;
/* clear MR[CS] channel start bit */
- dma->mr &= 1;
+ dma->mr &= FSL_DMA_MR_CS;
dma_sync();
if (status != 0)
@@ -67,8 +67,8 @@ static uint dma_check(void) {
void dma_init(void) {
volatile fsl_dma_t *dma = &dma_base->dma[0];
- dma->satr = 0x00040000;
- dma->datr = 0x00040000;
+ dma->satr = FSL_DMA_SATR_SREAD_NO_SNOOP;
+ dma->datr = FSL_DMA_DATR_DWRITE_NO_SNOOP;
dma->sr = 0xffffffff; /* clear any errors */
dma_sync();
}
@@ -81,11 +81,11 @@ int dma_xfer(void *dest, uint count, void *src) {
dma->bcr = count;
/* Disable bandwidth control, use direct transfer mode */
- dma->mr = 0xf000004;
+ dma->mr = FSL_DMA_MR_BWC_DIS | FSL_DMA_MR_CTM_DIRECT;
dma_sync();
/* Start the transfer */
- dma->mr = 0xf000005;
+ dma->mr = FSL_DMA_MR_BWC_DIS | FSL_DMA_MR_CTM_DIRECT | FSL_DMA_MR_CS;
dma_sync();
return dma_check();