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author | Marek Vasut <marex@denx.de> | 2015-07-17 03:44:26 +0200 |
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committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:16 +0200 |
commit | ac70d2f3873cea25b13d61e3442015696f27c597 (patch) | |
tree | 1f687efd0e72a4273c823a55513fb64f3f13ac00 /drivers/ddr | |
parent | d2ea49508a7295eb8a1ec4bd82d970d6ac162ed7 (diff) | |
download | u-boot-imx-ac70d2f3873cea25b13d61e3442015696f27c597.zip u-boot-imx-ac70d2f3873cea25b13d61e3442015696f27c597.tar.gz u-boot-imx-ac70d2f3873cea25b13d61e3442015696f27c597.tar.bz2 |
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 3
This is kind of microseries-within-series indent cleanup.
This patch just tweaks the indentation so it is visible
what to do with the grp_calibrated variable.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr')
-rw-r--r-- | drivers/ddr/altera/sequencer.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 2f2b88b..81c3307 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -2235,8 +2235,8 @@ static uint32_t rw_mgr_mem_calibrate_vfifo(uint32_t read_group, /* * In RLDRAMX we may be messing the delay of pins in * the same write group but outside of the current read - * the group, but that's ok because we haven't - * calibrated output side yet. + * the group, but that's ok because we haven't calibrated + * output side yet. */ if (d > 0) { scc_mgr_apply_group_all_out_delay_add_all_ranks( @@ -2276,27 +2276,27 @@ static uint32_t rw_mgr_mem_calibrate_vfifo(uint32_t read_group, * per shadow register basis. */ for (rank_bgn = 0, sr = 0; - rank_bgn < RW_MGR_MEM_NUMBER_OF_RANKS; - rank_bgn += NUM_RANKS_PER_SHADOW_REG, - ++sr) { + rank_bgn < RW_MGR_MEM_NUMBER_OF_RANKS; + rank_bgn += NUM_RANKS_PER_SHADOW_REG, sr++) { /* * Determine if this set of ranks * should be skipped entirely. */ - if (!param->skip_shadow_regs[sr]) { - /* - * If doing read after write - * calibration, do not update - * FOM, now - do it then. - */ - if (!rw_mgr_mem_calibrate_vfifo_center - (rank_bgn, write_group, - read_group, test_bgn, - 1, 0)) { - grp_calibrated = 0; - failed_substage = CAL_SUBSTAGE_VFIFO_CENTER; - } - } + if (param->skip_shadow_regs[sr]) + continue; + /* + * If doing read after write + * calibration, do not update + * FOM, now - do it then. + */ + if (rw_mgr_mem_calibrate_vfifo_center + (rank_bgn, write_group, + read_group, test_bgn, + 1, 0)) + continue; + + grp_calibrated = 0; + failed_substage = CAL_SUBSTAGE_VFIFO_CENTER; } } else { grp_calibrated = 0; |