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| author | Marek Vasut <marex@denx.de> | 2015-07-20 08:09:05 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:15 +0200 |
| commit | 287cdf6be748ca2600ba09c3363732fd66981e9a (patch) | |
| tree | e1532d155d4a39858626222e0f59ed05206dd00f /drivers/ddr | |
| parent | b2dfd100bc43863f467f552a7bb26932810f2f5e (diff) | |
| download | u-boot-imx-287cdf6be748ca2600ba09c3363732fd66981e9a.zip u-boot-imx-287cdf6be748ca2600ba09c3363732fd66981e9a.tar.gz u-boot-imx-287cdf6be748ca2600ba09c3363732fd66981e9a.tar.bz2 | |
ddr: altera: Clean up set_rank_and_odt_mask() part 2
Turn the big inner if (RW_MGR_MEM_NUMBER_OF_RANKS == ...) conditional
into a switch {} statement instead. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/altera/sequencer.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 7dd9a66..f7b5f52 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -164,16 +164,13 @@ static void set_rank_and_odt_mask(const u32 rank, const u32 odt_mode) odt_mask_0 = 0x0; odt_mask_1 = 0x0; } else { /* RW_MGR_ODT_MODE_READ_WRITE */ - if (RW_MGR_MEM_NUMBER_OF_RANKS == 1) { - /* - * 1 Rank - * Read: ODT = 0 - * Write: ODT = 1 - */ + switch (RW_MGR_MEM_NUMBER_OF_RANKS) { + case 1: /* 1 Rank */ + /* Read: ODT = 0 ; Write: ODT = 1 */ odt_mask_0 = 0x0; odt_mask_1 = 0x1; - } else if (RW_MGR_MEM_NUMBER_OF_RANKS == 2) { - /* 2 Ranks */ + break; + case 2: /* 2 Ranks */ if (RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM == 1) { /* - Dual-Slot , Single-Rank * (1 chip-select per DIMM) @@ -198,9 +195,9 @@ static void set_rank_and_odt_mask(const u32 rank, const u32 odt_mode) odt_mask_0 = 0x0; odt_mask_1 = 0x3 & (1 << rank); } - } else { - /* 4 Ranks - * Read: + break; + case 4: /* 4 Ranks */ + /* Read: * ----------+-----------------------+ * | | * | ODT | @@ -244,6 +241,7 @@ static void set_rank_and_odt_mask(const u32 rank, const u32 odt_mode) odt_mask_1 = 0xA; break; } + break; } } |