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| author | Marek Vasut <marex@denx.de> | 2015-07-19 07:57:28 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:21 +0200 |
| commit | ba522c769e175c99087b4c5bc2c3134c6276f33e (patch) | |
| tree | 22f5e8227360d76dd023822db9cd9a8db7092e76 /drivers/ddr | |
| parent | 7ce23bb6efc21ab3a041d0324f25a6e15492fb61 (diff) | |
| download | u-boot-imx-ba522c769e175c99087b4c5bc2c3134c6276f33e.zip u-boot-imx-ba522c769e175c99087b4c5bc2c3134c6276f33e.tar.gz u-boot-imx-ba522c769e175c99087b4c5bc2c3134c6276f33e.tar.bz2 | |
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 4
Clean up the inner loop a bit. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/altera/sequencer.c | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index c03fae1..4585e37 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -1234,25 +1234,27 @@ rw_mgr_mem_calibrate_read_test(const u32 rank_bgn, const u32 group, tmp_bit_chk = 0; for (vg = RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS - 1; vg >= 0; vg--) { - /* reset the fifos to get pointers to known state */ + /* Reset the FIFOs to get pointers to known state. */ writel(0, &phy_mgr_cmd->fifo_reset); writel(0, SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_RESET_READ_DATAPATH_OFFSET); - tmp_bit_chk = tmp_bit_chk << (RW_MGR_MEM_DQ_PER_READ_DQS - / RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS); - - if (all_groups) - addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_RUN_ALL_GROUPS_OFFSET; - else - addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | RW_MGR_RUN_SINGLE_GROUP_OFFSET; + if (all_groups) { + addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | + RW_MGR_RUN_ALL_GROUPS_OFFSET; + } else { + addr = SDR_PHYGRP_RWMGRGRP_ADDRESS | + RW_MGR_RUN_SINGLE_GROUP_OFFSET; + } writel(RW_MGR_READ_B2B, addr + ((group * RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS + vg) << 2)); base_rw_mgr = readl(SDR_PHYGRP_RWMGRGRP_ADDRESS); - tmp_bit_chk = tmp_bit_chk | (correct_mask_vg & ~(base_rw_mgr)); + tmp_bit_chk <<= RW_MGR_MEM_DQ_PER_READ_DQS / + RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS; + tmp_bit_chk |= correct_mask_vg & ~(base_rw_mgr); } *bit_chk &= tmp_bit_chk; |