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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-12-10 14:31:56 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-12-10 22:23:59 +0100 |
| commit | f15ea6e1d67782a1626d4a4922b6c20e380085e5 (patch) | |
| tree | 57d78f1ee94a2060eaa591533278d2934d4f1da3 /drivers/ddr/fsl/Makefile | |
| parent | cb7ee1b98cac6baf244daefb1192adf5a47bc983 (diff) | |
| parent | f44483b57c49282299da0e5c10073b909cdad979 (diff) | |
| download | u-boot-imx-f15ea6e1d67782a1626d4a4922b6c20e380085e5.zip u-boot-imx-f15ea6e1d67782a1626d4a4922b6c20e380085e5.tar.gz u-boot-imx-f15ea6e1d67782a1626d4a4922b6c20e380085e5.tar.bz2 | |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyard
Needed manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compulab/cm_t335/u-boot.lds
Diffstat (limited to 'drivers/ddr/fsl/Makefile')
| -rw-r--r-- | drivers/ddr/fsl/Makefile | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/ddr/fsl/Makefile b/drivers/ddr/fsl/Makefile new file mode 100644 index 0000000..265204f --- /dev/null +++ b/drivers/ddr/fsl/Makefile @@ -0,0 +1,34 @@ +# +# Copyright 2008-2011 Freescale Semiconductor, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# Version 2 as published by the Free Software Foundation. +# + +obj-$(CONFIG_SYS_FSL_DDR1) += main.o util.o ctrl_regs.o options.o \ + lc_common_dimm_params.o + +obj-$(CONFIG_SYS_FSL_DDR2) += main.o util.o ctrl_regs.o options.o \ + lc_common_dimm_params.o + +obj-$(CONFIG_SYS_FSL_DDR3) += main.o util.o ctrl_regs.o options.o \ + lc_common_dimm_params.o +ifdef CONFIG_DDR_SPD +SPD := y +endif +ifdef CONFIG_SPD_EEPROM +SPD := y +endif +ifdef SPD +obj-$(CONFIG_SYS_FSL_DDR1) += ddr1_dimm_params.o +obj-$(CONFIG_SYS_FSL_DDR2) += ddr2_dimm_params.o +obj-$(CONFIG_SYS_FSL_DDR3) += ddr3_dimm_params.o +endif + +obj-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o +obj-$(CONFIG_SYS_FSL_DDRC_GEN1) += mpc85xx_ddr_gen1.o +obj-$(CONFIG_SYS_FSL_DDRC_GEN2) += mpc85xx_ddr_gen2.o +obj-$(CONFIG_SYS_FSL_DDRC_GEN3) += mpc85xx_ddr_gen3.o +obj-$(CONFIG_SYS_FSL_DDR_86XX) += mpc86xx_ddr.o +obj-$(CONFIG_SYS_FSL_DDRC_ARM_GEN3) += arm_ddr_gen3.o |