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authorMarek Vasut <marex@denx.de>2016-04-05 23:41:56 +0200
committerMarek Vasut <marex@denx.de>2016-04-20 11:28:44 +0200
commitbba7711092a48ef2af00832213c3cb6c2d5f171c (patch)
tree69d254c7647c029d5fdde3ecf1c65b8678492c17 /drivers/ddr/altera
parentabaf83619cb1bcb095400c4117bdd3ebbc764905 (diff)
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ddr: altera: Tweak DQS tracking enable handling
In the most unlikely case the DQS tracking was to be disabled, make sure we do not errornously re-enable it. Note that DQS tracking is enabled on all systems observed thus far. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
Diffstat (limited to 'drivers/ddr/altera')
-rw-r--r--drivers/ddr/altera/sequencer.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index 34b1aa7..bf74b4e 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -3479,6 +3479,7 @@ grp_failed: /* A group failed, increment the counter. */
static int run_mem_calibrate(void)
{
int pass;
+ u32 ctrl_cfg;
debug("%s:%d\n", __func__, __LINE__);
@@ -3486,7 +3487,9 @@ static int run_mem_calibrate(void)
writel(PHY_MGR_CAL_RESET, &phy_mgr_cfg->cal_status);
/* Stop tracking manager. */
- clrbits_le32(&sdr_ctrl->ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK);
+ ctrl_cfg = readl(&sdr_ctrl->ctrl_cfg);
+ writel(ctrl_cfg & ~SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK,
+ &sdr_ctrl->ctrl_cfg);
phy_mgr_initialize();
rw_mgr_mem_initialize();
@@ -3507,7 +3510,7 @@ static int run_mem_calibrate(void)
writel(0x2, &phy_mgr_cfg->mux_sel);
/* Start tracking manager. */
- setbits_le32(&sdr_ctrl->ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK);
+ writel(ctrl_cfg, &sdr_ctrl->ctrl_cfg);
return pass;
}