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authorMichal Simek <monstr@monstr.eu>2016-02-13 10:31:32 +0100
committerMichal Simek <michal.simek@xilinx.com>2016-02-22 16:37:50 +0100
commit6a10bc5be8b809d43af7ddb66c45eeff7e622da1 (patch)
treea1618a39eabbe3a054ff91c3e0a49454e5a2ce90 /drivers/clk
parent9ec2cf00b456d64c9ef25ca2d1c4a95d4b855cee (diff)
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net: phy: realtek: Use generic genphy_parse_link() for RTL8211E
The problem with current implementation is that SPDDONE bit is 1 but link bit is zero. That's why phydev->link is setup to 0 which ending up in driver failure that link is not up. Log: Zynq> dhcp ethernet@e000b000 Waiting for PHY auto negotiation to complete....... done ethernet@e000b000: No link. There is at least 1ms delay between spddone bit and link up. Use genphy_read_status() instead of realtek implemenation which is working with page 11. Linux driver is also using generic implementation. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/clk')
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