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author | Jon Loeliger <jdl@freescale.com> | 2007-10-16 15:26:51 -0500 |
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committer | Jon Loeliger <jdl@freescale.com> | 2007-10-17 15:01:47 -0500 |
commit | 9553df86d3a319c3a1a7cde7e4edd6eeb5aa64c7 (patch) | |
tree | 35cf60715dde3c0a6e6870a3c74e50621fec3c7c /doc | |
parent | 3dd2db53ceb0dff80f25c2a07f83f29b907b403e (diff) | |
download | u-boot-imx-9553df86d3a319c3a1a7cde7e4edd6eeb5aa64c7.zip u-boot-imx-9553df86d3a319c3a1a7cde7e4edd6eeb5aa64c7.tar.gz u-boot-imx-9553df86d3a319c3a1a7cde7e4edd6eeb5aa64c7.tar.bz2 |
Initial mpc8610hpcd cpu/, README and include/ files.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Mahesh Jade <mahesh.jade@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/README.mpc8610hpcd | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/doc/README.mpc8610hpcd b/doc/README.mpc8610hpcd new file mode 100644 index 0000000..949dcb2 --- /dev/null +++ b/doc/README.mpc8610hpcd @@ -0,0 +1,67 @@ +Freescale MPC8610HPCD board +=========================== + + +Building U-Boot +--------------- + + $ make MPC8610HPCD_config + Configuring for MPC8610HPCD board... + + $ make + + +Flashing U-Boot +--------------- +The flash is 128M starting at 0xF800_0000. + +The alternate image is at 0xFBF0_0000 +The boot image is at 0xFFF0_0000. + + +To Flash U-Boot into the booting bank: + + tftp 1000000 u-boot.bin + protect off all + erase fff00000 +$filesize + cp.b 1000000 fff00000 $filesize + + +To Flash U-boot into the alternate bank + + tftp 1000000 u-boot.bin + erase fbf00000 +$filesize + cp.b 1000000 fbf00000 $filesize + + +pixis_reset command +------------------- +A new command, "pixis_reset", is introduced to reset mpc8610hpcd board +using the FPGA sequencer. When the board restarts, it has the option +of using either the current or alternate flash bank as the boot +image, with or without the watchdog timer enabled, and finally with +or without frequency changes. + +Usage is; + + pixis_reset + pixis_reset altbank + pixis_reset altbank wd + pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> + pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> + +Examples; + + /* reset to current bank, like "reset" command */ + pixis_reset + + /* reset board but use the to alternate flash bank */ + pixis_reset altbank + + /* reset board, use alternate flash bank with watchdog timer enabled*/ + pixis_reset altbank wd + + /* reset board to alternate bank with frequency changed. + * 40 is SYSCLK, 2.5 is COREPLL ratio, 10 is MPXPLL ratio + */ + pixis-reset altbank cf 40 2.5 10 |