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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-06-19 12:53:59 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-06-19 12:53:59 +0200 |
commit | 69f14dc2fd64307f012381dd333a06001dec75dc (patch) | |
tree | 1c520dfb9afd8406230a5382ebaf57b0b8cd6c5d /doc | |
parent | 847e6693ccb529bf8346db62876f38f0c4e04ade (diff) | |
parent | ed7bdc03eb516fb698ccc12ec5b4b9f132d05c5f (diff) | |
download | u-boot-imx-69f14dc2fd64307f012381dd333a06001dec75dc.zip u-boot-imx-69f14dc2fd64307f012381dd333a06001dec75dc.tar.gz u-boot-imx-69f14dc2fd64307f012381dd333a06001dec75dc.tar.bz2 |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Conflicts:
spl/Makefile
Diffstat (limited to 'doc')
-rw-r--r-- | doc/device-tree-bindings/exynos/dwmmc.txt | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt b/doc/device-tree-bindings/exynos/dwmmc.txt new file mode 100644 index 0000000..566da3b --- /dev/null +++ b/doc/device-tree-bindings/exynos/dwmmc.txt @@ -0,0 +1,54 @@ +* Exynos 5250 DWC_mobile_storage + +The Exynos 5250 provides DWC_mobile_storage interface which supports +. Embedded Multimedia Cards (EMMC-version 4.5) +. Secure Digital memory (SD mem-version 2.0) +. Secure Digital I/O (SDIO-version 3.0) +. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1) + +The Exynos 5250 DWC_mobile_storage provides four channels. +SOC specific and Board specific properties are channel specific. + +Required SoC Specific Properties: + +- compatible: should be + - samsung,exynos5250-dwmmc: for exynos5250 platforms + +- reg: physical base address of the controller and length of memory mapped + region. + +- interrupts: The interrupt number to the cpu. + +Required Board Specific Properties: + +- #address-cells: should be 1. +- #size-cells: should be 0. +- samsung,bus-width: The width of the bus used to interface the devices + supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO). + . Typically the bus width is 4 or 8. +- samsung,timing: The timing values to be written into the + Drv/sample clock selection register of corresponding channel. + . It is comprised of 3 values corresponding to the 3 fileds + 'SelClk_sample', 'SelClk_drv' and 'DIVRATIO' of CLKSEL register. + . SelClk_sample: Select sample clock among 8 shifted clocks. + . SelClk_drv: Select drv clock among 8 shifted clocks. + . DIVRATIO: Clock Divide ratio select. + . The above 3 values are used by the clock phase shifter. + +Example: + +mmc@12200000 { + samsung,bus-width = <8>; + samsung,timing = <1 3 3>; + samsung,removable = <1>; +} +In the above example, + . The bus width is 8 + . Timing is comprised of 3 values as explained below + 1 - SelClk_sample + 3 - SelClk_drv + 3 - DIVRATIO + . The 'removable' flag indicates whether the the particilar device + cannot be removed (always present) or it is a removable device. + 1 - Indicates that the device is removable. + 0 - Indicates that the device cannot be removed. |