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authorYork Sun <york.sun@nxp.com>2016-04-04 11:41:26 -0700
committerYork Sun <york.sun@nxp.com>2016-04-06 10:26:46 -0700
commit3c1d218a1d3048fb576677c47eab43049d0b7778 (patch)
treefac5c6482522cef5563f368ee2777f4ed274759e /doc
parent2a5558399828e24fce9e948288a88cd28887875e (diff)
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armv8: LS2080A: Consolidate LS2080A and LS2085A
LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'doc')
-rw-r--r--doc/device-tree-bindings/serial/8250.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/doc/device-tree-bindings/serial/8250.txt b/doc/device-tree-bindings/serial/8250.txt
index 91d5ab0..ba8edae 100644
--- a/doc/device-tree-bindings/serial/8250.txt
+++ b/doc/device-tree-bindings/serial/8250.txt
@@ -53,7 +53,7 @@ Note:
Represents a single port that is compatible with the DUART found
on many Freescale chips (examples include mpc8349, mpc8548,
- mpc8641d, p4080 and ls2085a).
+ mpc8641d, p4080 and ls2080a).
Example: