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| author | Tom Rini <trini@ti.com> | 2014-11-03 12:42:58 -0500 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-11-03 12:42:58 -0500 |
| commit | 130aec779ad9a2e28dc9d42ca5b367b957f311d7 (patch) | |
| tree | c7cf34379e96251533679f57949d2636bc8928d0 /doc | |
| parent | 2c54cb5516238ae93c930dee7f8e353291f2cdfb (diff) | |
| parent | 027a9a002455a1175b0f5b7c7c5350afab2b4421 (diff) | |
| download | u-boot-imx-130aec779ad9a2e28dc9d42ca5b367b957f311d7.zip u-boot-imx-130aec779ad9a2e28dc9d42ca5b367b957f311d7.tar.gz u-boot-imx-130aec779ad9a2e28dc9d42ca5b367b957f311d7.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-spi
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/SPI/README.altera_spi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/doc/SPI/README.altera_spi b/doc/SPI/README.altera_spi new file mode 100644 index 0000000..b07449f --- /dev/null +++ b/doc/SPI/README.altera_spi @@ -0,0 +1,6 @@ +SoCFPGA EPCS/EPCQx1 mini howto: +- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild +- The controller base address is the "Base" in QSys + 0x400 +- Set MSEL[4:0]=10010 (AS Standard) +- Load the bitstream into FPGA, enable bridges +- Only then will the driver work |