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authorMasahiro Yamada <yamada.masahiro@socionext.com>2015-07-21 14:04:24 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2015-07-23 23:42:37 +0900
commit62102bee1ff32e7eda8b31558b0b646df74fecfd (patch)
tree1f560afccd22ff021621a1be565af9081e7c424a /doc
parentf1d794531cfc1844cbe3de3c9a0c721561e6f877 (diff)
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ARM: UniPhier: document reference support card
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'doc')
-rw-r--r--doc/README.uniphier46
1 files changed, 44 insertions, 2 deletions
diff --git a/doc/README.uniphier b/doc/README.uniphier
index 4dacc9c..52d681b 100644
--- a/doc/README.uniphier
+++ b/doc/README.uniphier
@@ -85,6 +85,48 @@ Supported devices
- Support card (SRAM, NOR flash, some peripherals)
+Micro Support Card
+------------------
+
+The recommended bit switch settings are as follows:
+
+ SW2 OFF(1)/ON(0) Description
+ ------------------------------------------
+ bit 1 <---- BKSZ[0]
+ bit 2 ----> BKSZ[1]
+ bit 3 <---- SoC Bus Width 16/32
+ bit 4 <---- SERIAL_SEL[0]
+ bit 5 ----> SERIAL_SEL[1]
+ bit 6 ----> BOOTSWAP_EN
+ bit 7 <---- CS1/CS5
+ bit 8 <---- SOC_SERIAL_DISABLE
+
+ SW8 OFF(1)/ON(0) Description
+ ------------------------------------------
+ bit 1 ----> CS1_SPLIT
+ bit 2 <---- CASE9_ON
+ bit 3 <---- CASE10_ON
+ bit 4 Don't Care Reserve
+ bit 5 Don't Care Reserve
+ bit 6 Don't Care Reserve
+ bit 7 ----> BURST_EN
+ bit 8 ----> FLASHBUS32_16
+
+The BKSZ[1:0] specifies the address range of memory slot and peripherals
+as follows:
+
+ BKSZ Description RAM slot Peripherals
+ --------------------------------------------------------------------
+ 0b00 15MB RAM / 1MB Peri 00000000-0effffff 0f000000-0fffffff
+ 0b01 31MB RAM / 1MB Peri 00000000-1effffff 1f000000-1fffffff
+ 0b10 64MB RAM / 1MB Peri 00000000-3effffff 3f000000-3fffffff
+ 0b11 127MB RAM / 1MB Peri 00000000-7effffff 7f000000-7fffffff
+
+Set BSKZ[1:0] to 0b01 for U-Boot.
+This mode is the most handy because EA[24] is always supported by the save pin
+mode of the system bus. On the other hand, EA[25] is not supported for some
+newer SoCs. Even if it is, EA[25] is not connected on most of the boards.
+
--
-Masahiro Yamada <yamada.m@jp.panasonic.com>
-Feb. 2015
+Masahiro Yamada <yamada.masahiro@socionext.com>
+Jul. 2015