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authorSimon Glass <sjg@chromium.org>2015-01-01 16:18:15 -0700
committerSimon Glass <sjg@chromium.org>2015-01-13 07:25:02 -0800
commitcb3b2e62caa7b87ed727d690c5a8bd1e003ab601 (patch)
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parentc72f74e2780350f16795dc4d69145b9c87cb3e97 (diff)
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x86: Add an 'mtrr' command to list and adjust MTRRs
It is useful to be able to see the MTRR setup in U-Boot. Add a command to list the state of the variable MTRR registers and allow them to be changed. Update the documentation to list some of the available commands. This does not support fixed MTRRs as yet. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'doc')
-rw-r--r--doc/README.x8618
1 files changed, 17 insertions, 1 deletions
diff --git a/doc/README.x86 b/doc/README.x86
index 5fab044..b474161 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -110,9 +110,25 @@ be turned on. Not every device on the board is configured via devie tree, but
more and more devices will be added as time goes by. Check out the directory
arch/x86/dts/ for these device tree source files.
+Useful Commands
+---------------
+
+In keeping with the U-Boot philosophy of providing functions to check and
+adjust internal settings, there are several x86-specific commands that may be
+useful:
+
+hob - Display information about Firmware Support Package (FSP) Hand-off
+ Block. This is only available on platforms which use FSP, mostly
+ Atom.
+iod - Display I/O memory
+iow - Write I/O memory
+mtrr - List and set the Memory Type Range Registers (MTRR). These are used to
+ tell the CPU whether memory is cacheable and if so the cache write
+ mode to use. U-Boot sets up some reasonable values but you can
+ adjust then with this command.
+
TODO List
---------
-- MTRR support (for performance)
- Audio
- Chrome OS verified boot
- SMI and ACPI support, to provide platform info and facilities to Linux