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authorTom Rini <trini@ti.com>2014-09-09 20:01:59 -0400
committerTom Rini <trini@ti.com>2014-09-09 20:01:59 -0400
commit8c9c74e4c69b43cd50a1f04b34cfc141ed21654c (patch)
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parentb4ecc8c6f8c85d25f72933af23531728069a5b0f (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
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+CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode.
+CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode.
+
+Accessing ESDHC registers can be determined by ESDHC IP's endian
+mode or processor's endian mode.