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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-11-25 13:01:58 +0100
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-11-25 13:01:58 +0100
commitb8a7c467960ffb4d5a5e1eef5f7783fb6f594542 (patch)
treeda95eeaa6578048658ff60f20a9b498730c67917 /doc
parent3786a942b5892441982f5d8908303f360bac9f8c (diff)
parent1d4fd0dc3b45de7b7a706285845ef5b527422014 (diff)
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Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Diffstat (limited to 'doc')
-rw-r--r--doc/README.imx55
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diff --git a/doc/README.imx5 b/doc/README.imx5
index f7eab7d..e08941e 100644
--- a/doc/README.imx5
+++ b/doc/README.imx5
@@ -15,3 +15,8 @@ i.MX5x SoCs.
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.
+
+1.2 CONFIG_SYS_MAIN_PWR_ON: Trigger MAIN_PWR_ON upon startup.
+ This option should be enabled for boards having a SYS_ON_OFF_CTL signal
+ connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
+ reference designs.