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| author | Wolfgang Denk <wd@denx.de> | 2008-06-28 23:34:37 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-06-28 23:34:37 +0200 |
| commit | e093a247628228100f405b6d7f6b1bfc16141938 (patch) | |
| tree | 5996ff53cdbbb65df98f94abd24b2904cfc8e884 /doc | |
| parent | 01db232dd7a0ceb81208a9f2545720c80e5bfd83 (diff) | |
| download | u-boot-imx-e093a247628228100f405b6d7f6b1bfc16141938.zip u-boot-imx-e093a247628228100f405b6d7f6b1bfc16141938.tar.gz u-boot-imx-e093a247628228100f405b6d7f6b1bfc16141938.tar.bz2 | |
Coding Style Cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.mvblm7 | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/doc/README.mvblm7 b/doc/README.mvblm7 index 6a40888..3ee9396 100644 --- a/doc/README.mvblm7 +++ b/doc/README.mvblm7 @@ -11,7 +11,7 @@ Matrix Vision mvBlueLYNX-M7 (mvBL-M7) 2 System Components -2.1 CPU +2.1 CPU Freescale MPC8343VRAGDB CPU running at 400MHz core and 266MHz csb. 512MByte DDR-II memory @ 133MHz. 8 MByte Nor Flash on local bus. @@ -23,7 +23,7 @@ Matrix Vision mvBlueLYNX-M7 (mvBL-M7) 2.2 PCI A miniPCI Type-III socket is present. PCI clock fixed at 66MHz. - + 2.3 FPGA Altera Cyclone-II EP2C20/35 with PCI DMA engines. Connects to dual Matrix Vision specific CCD/CMOS sensor interfaces. @@ -82,4 +82,3 @@ Matrix Vision mvBlueLYNX-M7 (mvBL-M7) 2. Initrd - name is stored in "initrd_name" 3. device tree blob - name is stored in "dtb_name" Fallback files are the flash versions. - |