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diff --git a/doc/README.IPHASE4539 b/doc/README.IPHASE4539
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+
+This file contains basic information on the port of U-Boot to IPHASE4539
+(Interphase 4539 T1/E1/J1 PMC Communications Controller).
+All the changes fit in the common U-Boot infrastructure, providing a new
+IPHASE4539-specific entry in makefiles. To build U-Boot for IPHASE4539,
+type "make IPHASE4539_config", edit the "include/config_IPHASE4539.h"
+file if necessary, then type "make".
+
+
+Common file modifications:
+--------------------------
+
+The following common files have been modified by this project:
+(starting from the ppcboot-1.1.5/ directory)
+
+MAKEALL				- IPHASE4539 entry added
+Makefile			- IPHASE4539_config entry added
+
+
+New files:
+----------
+
+The following new files have been added by this project:
+(starting from the ppcboot-1.1.5/ directory)
+
+board/iphase4539/		- board-specific directory
+board/iphase4539/Makefile	- board-specific makefile
+board/iphase4539/config.mk	- config file
+board/iphase4539/flash.c	- flash driver (for AM29LV033C)
+board/iphase4539/ppcboot.lds	- linker script
+board/iphase4539/iphase4539.c	- ioport and memory initialization
+include/config_IPHASE4539.h	- main configuration file
+
+
+New configuration options:
+--------------------------
+
+CONFIG_IPHASE4539
+
+	Main board-specific option (should be defined for IPHASE4539).
+
+
+Acceptance criteria tests:
+--------------------------
+
+The following tests have been conducted to validate the port of U-Boot
+to IPHASE4539:
+
+1. Operation on serial console:
+
+With SMC1 defined as console in the main configuration file, the U-Boot
+output appeared on the serial terminal connected to the 2.5mm stereo jack
+connector as follows:
+
+------------------------------------------------------------------------------
+=> help
+autoscr - run script from memory
+base    - print or set address offset
+bdinfo  - print Board Info structure
+bootm   - boot application image from memory
+bootp   - boot image via network using BootP/TFTP protocol
+bootd   - boot default, i.e., run 'bootcmd'
+cmp     - memory compare
+coninfo - print console devices and informations
+cp      - memory copy
+crc32   - checksum calculation
+dcache  - enable or disable data cache
+echo    - echo args to console
+erase   - erase FLASH memory
+flinfo  - print FLASH memory information
+go      - start application at address 'addr'
+help    - print online help
+icache  - enable or disable instruction cache
+iminfo  - print header information for application image
+loadb   - load binary file over serial line (kermit mode)
+loads   - load S-Record file over serial line
+loop    - infinite loop on address range
+md      - memory display
+mm      - memory modify (auto-incrementing)
+mtest   - simple RAM test
+mw      - memory write (fill)
+nm      - memory modify (constant address)
+printenv- print environment variables
+protect - enable or disable FLASH write protection
+rarpboot- boot image via network using RARP/TFTP protocol
+reset   - Perform RESET of the CPU
+run     - run commands in an environment variable
+saveenv - save environment variables to persistent storage
+setenv  - set environment variables
+sleep   - delay execution for some time
+tftpboot- boot image via network using TFTP protocol
+               and env variables ipaddr and serverip
+version - print monitor version
+?       - alias for 'help'
+=>
+------------------------------------------------------------------------------
+
+
+2. Flash driver operation
+
+The following sequence was performed to test the "flinfo" command:
+
+------------------------------------------------------------------------------
+=> flinfo
+
+Bank # 1: AMD AM29LV033C (32 Mbit, uniform sectors)
+  Size: 4 MB in 64 Sectors
+  Sector Start Addresses:
+    FF800000 (RO) FF810000 (RO) FF820000      FF830000      FF840000
+    FF850000      FF860000      FF870000      FF880000      FF890000
+    FF8A0000      FF8B0000      FF8C0000      FF8D0000      FF8E0000
+    FF8F0000      FF900000      FF910000      FF920000      FF930000
+    FF940000      FF950000      FF960000      FF970000      FF980000
+    FF990000      FF9A0000      FF9B0000      FF9C0000      FF9D0000
+    FF9E0000      FF9F0000      FFA00000      FFA10000      FFA20000
+    FFA30000      FFA40000      FFA50000      FFA60000      FFA70000
+    FFA80000      FFA90000      FFAA0000      FFAB0000      FFAC0000
+    FFAD0000      FFAE0000      FFAF0000      FFB00000 (RO) FFB10000 (RO)
+    FFB20000 (RO) FFB30000 (RO) FFB40000      FFB50000      FFB60000
+    FFB70000      FFB80000      FFB90000      FFBA0000      FFBB0000
+    FFBC0000      FFBD0000      FFBE0000      FFBF0000
+------------------------------------------------------------------------------
+
+Note: the Hardware Configuration Word (HWC) of the 8260 is on the
+first sector of the flash and should not be touched. The U-Boot
+environment variables are stored on second sector and U-Boot
+starts at the address 0xFFB00000.
+
+
+The following sequence was performed to test the erase command:
+
+------------------------------------------------------------------------------
+=> cp 0 ff880000 10
+Copy to Flash... done
+=> md ff880000 20
+ff880000: ff000000 60000000 60000000 7c7f1b78    ....`...`...|..x
+ff880010: 7c9e2378 7cbd2b78 7cdc3378 7cfb3b78    |.#x|.+x|.3x|.;x
+ff880020: 3b000000 4811e0f5 48003719 480036a5    ;...H...H.7.H.6.
+ff880030: 480036f9 48003731 48005c5d 7c7a1b78    H.6.H.71H.\]|z.x
+ff880040: ffffffff ffffffff ffffffff ffffffff    ................
+ff880050: ffffffff ffffffff ffffffff ffffffff    ................
+ff880060: ffffffff ffffffff ffffffff ffffffff    ................
+ff880070: ffffffff ffffffff ffffffff ffffffff    ................
+=> erase ff880000 ff88ffff
+Erase Flash from 0xff880000 to 0xff88ffff
+.. done
+Erased 1 sectors
+=> md ff880000
+ff880000: ffffffff ffffffff ffffffff ffffffff    ................
+ff880010: ffffffff ffffffff ffffffff ffffffff    ................
+ff880020: ffffffff ffffffff ffffffff ffffffff    ................
+ff880030: ffffffff ffffffff ffffffff ffffffff    ................
+ff880040: ffffffff ffffffff ffffffff ffffffff    ................
+ff880050: ffffffff ffffffff ffffffff ffffffff    ................
+ff880060: ffffffff ffffffff ffffffff ffffffff    ................
+ff880070: ffffffff ffffffff ffffffff ffffffff    ................
+=> cp 0 ff880000 10
+Copy to Flash... done
+=> md ff880000 20
+ff880000: ff000000 60000000 60000000 7c7f1b78    ....`...`...|..x
+ff880010: 7c9e2378 7cbd2b78 7cdc3378 7cfb3b78    |.#x|.+x|.3x|.;x
+ff880020: 3b000000 4811e0f5 48003719 480036a5    ;...H...H.7.H.6.
+ff880030: 480036f9 48003731 48005c5d 7c7a1b78    H.6.H.71H.\]|z.x
+ff880040: ffffffff ffffffff ffffffff ffffffff    ................
+ff880050: ffffffff ffffffff ffffffff ffffffff    ................
+ff880060: ffffffff ffffffff ffffffff ffffffff    ................
+ff880070: ffffffff ffffffff ffffffff ffffffff    ................
+=> erase 1:8
+Erase Flash Sectors 8-8 in Bank # 1
+.. done
+=> md ff880000 20
+ff880000: ffffffff ffffffff ffffffff ffffffff    ................
+ff880010: ffffffff ffffffff ffffffff ffffffff    ................
+ff880020: ffffffff ffffffff ffffffff ffffffff    ................
+ff880030: ffffffff ffffffff ffffffff ffffffff    ................
+ff880040: ffffffff ffffffff ffffffff ffffffff    ................
+ff880050: ffffffff ffffffff ffffffff ffffffff    ................
+ff880060: ffffffff ffffffff ffffffff ffffffff    ................
+ff880070: ffffffff ffffffff ffffffff ffffffff    ................
+=> cp 0 ff880000 10
+Copy to Flash... done
+=> cp 0 ff890000 10
+=> md ff880000 20
+ff880000: ff000000 60000000 60000000 7c7f1b78    ....`...`...|..x
+ff880010: 7c9e2378 7cbd2b78 7cdc3378 7cfb3b78    |.#x|.+x|.3x|.;x
+ff880020: 3b000000 4811e0f5 48003719 480036a5    ;...H...H.7.H.6.
+ff880030: 480036f9 48003731 48005c5d 7c7a1b78    H.6.H.71H.\]|z.x
+ff880040: ffffffff ffffffff ffffffff ffffffff    ................
+ff880050: ffffffff ffffffff ffffffff ffffffff    ................
+ff880060: ffffffff ffffffff ffffffff ffffffff    ................
+ff880070: ffffffff ffffffff ffffffff ffffffff    ................
+=> md ff890000
+ff890000: ff000000 60000000 60000000 7c7f1b78    ....`...`...|..x
+ff890010: 7c9e2378 7cbd2b78 7cdc3378 7cfb3b78    |.#x|.+x|.3x|.;x
+ff890020: 3b000000 4811e0f5 48003719 480036a5    ;...H...H.7.H.6.
+ff890030: 480036f9 48003731 48005c5d 7c7a1b78    H.6.H.71H.\]|z.x
+ff890040: ffffffff ffffffff ffffffff ffffffff    ................
+ff890050: ffffffff ffffffff ffffffff ffffffff    ................
+ff890060: ffffffff ffffffff ffffffff ffffffff    ................
+ff890070: ffffffff ffffffff ffffffff ffffffff    ................
+=> erase 1:8-9
+Erase Flash Sectors 8-9 in Bank # 1
+.... done
+=> md ff880000 20
+ff880000: ffffffff ffffffff ffffffff ffffffff    ................
+ff880010: ffffffff ffffffff ffffffff ffffffff    ................
+ff880020: ffffffff ffffffff ffffffff ffffffff    ................
+ff880030: ffffffff ffffffff ffffffff ffffffff    ................
+ff880040: ffffffff ffffffff ffffffff ffffffff    ................
+ff880050: ffffffff ffffffff ffffffff ffffffff    ................
+ff880060: ffffffff ffffffff ffffffff ffffffff    ................
+ff880070: ffffffff ffffffff ffffffff ffffffff    ................
+=> md ff890000
+ff890000: ffffffff ffffffff ffffffff ffffffff    ................
+ff890010: ffffffff ffffffff ffffffff ffffffff    ................
+ff890020: ffffffff ffffffff ffffffff ffffffff    ................
+ff890030: ffffffff ffffffff ffffffff ffffffff    ................
+ff890040: ffffffff ffffffff ffffffff ffffffff    ................
+ff890050: ffffffff ffffffff ffffffff ffffffff    ................
+ff890060: ffffffff ffffffff ffffffff ffffffff    ................
+ff890070: ffffffff ffffffff ffffffff ffffffff    ................
+=>
+------------------------------------------------------------------------------
+
+
+The following sequence was performed to test the Flash programming commands:
+
+------------------------------------------------------------------------------
+=> erase ff880000 ff88ffff
+Erase Flash from 0xff880000 to 0xff88ffff
+.. done
+Erased 1 sectors
+=> cp 0 ff880000 10
+Copy to Flash... done
+=> md 0 20
+00000000: ff000000 60000000 60000000 7c7f1b78    ....`...`...|..x
+00000010: 7c9e2378 7cbd2b78 7cdc3378 7cfb3b78    |.#x|.+x|.3x|.;x
+00000020: 3b000000 4811e0f5 48003719 480036a5    ;...H...H.7.H.6.
+00000030: 480036f9 48003731 48005c5d 7c7a1b78    H.6.H.71H.\]|z.x
+00000040: 3c83c000 2c040000 40823378 7c0000a6    <...,...@.3x|...
+00000050: 60000030 7c1b03a6 3c00c000 600035ec    `..0|...<...`.5.
+00000060: 7c1a03a6 4c000064 00000000 00000000    |...L..d........
+00000070: 00000000 00000000 00000000 00000000    ................
+=> md ff880000 20
+ff880000: ff000000 60000000 60000000 7c7f1b78    ....`...`...|..x
+ff880010: 7c9e2378 7cbd2b78 7cdc3378 7cfb3b78    |.#x|.+x|.3x|.;x
+ff880020: 3b000000 4811e0f5 48003719 480036a5    ;...H...H.7.H.6.
+ff880030: 480036f9 48003731 48005c5d 7c7a1b78    H.6.H.71H.\]|z.x
+ff880040: ffffffff ffffffff ffffffff ffffffff    ................
+ff880050: ffffffff ffffffff ffffffff ffffffff    ................
+ff880060: ffffffff ffffffff ffffffff ffffffff    ................
+ff880070: ffffffff ffffffff ffffffff ffffffff    ................
+=>
+------------------------------------------------------------------------------
+
+
+The following sequence was performed to test storage of the environment
+variables in Flash:
+
+------------------------------------------------------------------------------
+=> setenv foo bar
+=> saveenv
+Un-Protected 1 sectors
+Erasing Flash...
+.. done
+Erased 1 sectors
+Saving Environment to Flash...
+Protected 1 sectors
+=> reset
+...
+=> printenv
+...
+foo=bar
+...
+Environment size: 339/65532 bytes
+=>
+------------------------------------------------------------------------------
+
+
+The following sequence was performed to test image download and run over
+Ethernet interface (both interfaces were tested):
+
+------------------------------------------------------------------------------
+=> tftpboot 40000 hello_world.bin
+ARP broadcast 1
+TFTP from server 10.0.0.1; our IP address is 10.0.0.8
+Filename 'hello_world.bin'.
+Load address: 0x40000
+Loading: #############
+done
+Bytes transferred = 65932 (1018c hex)
+=> go 40004
+## Starting application at 0x00040004 ...
+Hello World
+argc = 1
+argv[0] = "40004"
+argv[1] = "<NULL>"
+Hit any key to exit ...
+
+## Application terminated, rc = 0x0
+=>
+------------------------------------------------------------------------------
+
+
+3. Known Problems
+
+None for the moment.
+
+
+----------------------------------------------------------------------------
+U-Boot and Linux for Interphase 4539 T1/E1/J1 PMC Communications Controller
+----------------------------------------------------------------------------
+
+U-Boot:
+
+	Configure and make U-Boot:
+
+	$ cd <path>/u-boot
+	$ make IPHASE4539_config
+	$ make dep
+	$ make
+	$ cp -p u-boot.bin /tftpboot
+
+	Load u-boot.bin into the Flash memory at 0xffb00000.
+
+
+Linux:
+
+	Configure and make Linux:
+
+	$ cd <patch>/linux-2.4
+	$ make IPHASE4539_config
+	$ make oldconfig
+	$ make dep
+	$ make pImage
+	$ cp -p arch/ppc/mbxboot/pImage /tftpboot
+
+	Load pImage via tftp and boot it.
+
+
+Flash organisation:
+
+	The following preliminary layout of the Flash memory
+	is defined:
+
+	0xff800000 (   0    -   64 kB): Hardware Configuration Word.
+	0xff810000 (  64 kB -  128 kB): U-Boot Environment.
+	0xff820000 ( 128 kB -    3 MB): RAMdisk.
+	0xffb00000 (   3 MB - 3328 kB): U-Boot.
+	0xffb40000 (3328 KB -    4 MB): Linux Kernel.
+
+
+For further information concerning U-Boot and Linux please consult
+the "DENX U-Boot and Linux Guide".
+
+
+(C) 2002 Wolfgang Grandegger, DENX Software Engineering, wg@denx.de
+===================================================================
diff --git a/doc/README.RPXClassic b/doc/README.RPXClassic
new file mode 100644
index 0000000..5caa2bc
--- /dev/null
+++ b/doc/README.RPXClassic
@@ -0,0 +1,21 @@
+# Porting U-Boot onto RPXClassic LF_BW31 board
+# Written by Pierre AUBERT
+# E-Mail  p.aubert@staubli.com
+# Stäubli Faverges - <www.staubli.com>
+#
+# Sept. 20 2001
+#
+# Cross compile: Montavista Hardhat ported on HP-UX 10.20
+#
+
+Flash memories : AM29DL323B (2 banks flash memories) 16 Mb from 0xff000000
+DRAM : 16 Mb from 0
+NVRAM : 512 kb from 0xfa000000
+
+
+- environment is stored in NVRAM
+- Mac address is read from EEPROM
+- ethernet on SCC1 or fast ethernet on FEC are running (depending on the
+  configuration flag CONFIG_FEC_ENET)
+
+
diff --git a/doc/README.fads b/doc/README.fads
new file mode 100644
index 0000000..0128ef7
--- /dev/null
+++ b/doc/README.fads
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright 2000
+ * Dave Ellis, SIXNET, dge@sixnetio.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+Using the Motorola MPC8XXFADS development board
+===============================================
+
+CONFIGURATIONS
+--------------
+
+There are ready-to-use default configurations available for the
+FADS823, FADS850SAR and FADS860T. The FADS860T configuration also
+works for the 855T processor.
+
+LOADING U-Boot INTO FADS FLASH MEMORY
+--------------------------------------
+
+MPC8BUG can load U-Boot into the FLASH memory using LOADF.
+
+    loadf u-boot.srec 100000
+
+
+STARTING U-Boot FROM MPC8BUG
+-----------------------------
+
+To start U-Boot from MPC8BUG:
+
+1. Reset the board:
+    reset :h
+
+2. Change BR0 and OR0 back to their values at reset:
+    rms memc br0 00000001
+    rms memc or0 00000d34
+
+3. Modify DER so MPC8BUG gets control only when it should:
+    rms der 2002000f
+
+4. Start as if from reset:
+    go 100
+
+This is NOT exactly the same as starting U-Boot without
+MPC8BUG. MPC8BUG turns off the watchdog as part of the hard reset.
+After it does the reset it writes SYPCR (to disable the watchdog)
+and sets BR0 and OR0 to map the FLASH at 0x02800000 (and does lots
+of other initialization). That is why it is necessary to set BR0
+and OR0 to map the FLASH everywhere. U-Boot can't turn on the
+watchdog after that, since MPC8BUG has used the only chance to write
+to SYPCR.
+
+Here is a bizarre sequence of MPC8BUG and U-Boot commands that lets
+U-Boot write to SYPCR. It works with MPC8BUG 1.5 and an 855T
+processor (your mileage may vary). It is probably better (and a lot
+easier) just to accept having the watchdog disabled when the debug
+cable is connected.
+
+in MPC8BUG:
+  reset :h
+  rms memc br0 00000001
+  rms memc or0 00000d34
+  rms der 2000f
+  go 100
+
+Now U-Boot is running with the MPC8BUG value for SYPCR. Use the
+U-Boot 'reset' command to reset the board.
+  =>reset
+Next, in MPC8BUG:
+  rms der 2000f
+  go
+
+Now U-Boot is running with the U-Boot value for SYPCR.
+
diff --git a/doc/README.video b/doc/README.video
new file mode 100644
index 0000000..c145d9b
--- /dev/null
+++ b/doc/README.video
@@ -0,0 +1,30 @@
+/*
+ * (C) Copyright 2000
+ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+U-Boot MPC8xx video controller driver
+======================================
+
+The driver has been tested with the following configurations:
+
+- MPC823FADS with AD7176 on a PAL TV (YCbYCr) 	- arsenio@tin.it
+- GENIETV    with AD7177 on a PAL TV (YCbYCr)	- arsenio@tin.it