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| author | Matthew McClintock <msm@freescale.com> | 2006-06-28 10:47:03 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2006-08-09 13:51:05 -0500 |
| commit | 34c3c0e01dbf1f8cc2bd08de92f2b89ba84921eb (patch) | |
| tree | a7386d9f9b99d34c15bec88d1198c2e598f782b4 /doc | |
| parent | b6c5e1373b6ea0bb37a18e4aeecec00613d1cd39 (diff) | |
| download | u-boot-imx-34c3c0e01dbf1f8cc2bd08de92f2b89ba84921eb.zip u-boot-imx-34c3c0e01dbf1f8cc2bd08de92f2b89ba84921eb.tar.gz u-boot-imx-34c3c0e01dbf1f8cc2bd08de92f2b89ba84921eb.tar.bz2 | |
* Switched default PCI speed for 8540 ADS back to 33MHz
* Added comments and a printf to warn that PCI-X won't
work at 33MHz
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/README.mpc85xxads | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/doc/README.mpc85xxads b/doc/README.mpc85xxads index f0cf782..ae8202b 100644 --- a/doc/README.mpc85xxads +++ b/doc/README.mpc85xxads @@ -100,6 +100,9 @@ Updated 13-July-2004 Jon Loeliger SW7[1:4] = 0101 = 5 => 5 x 66 = 330 CCB Sysclk SW7[5:6] = 01 => 5:2 x 330 = 825 Core clock + In order to use PCI-X (only in the first PCI slot. The one with + the RIO connector), you need to set SW1[4] (config) to 1 (off). + Also, configure the board to run PCI at 66 MHz. 2. MEMORY MAP TO WORK WITH LINUX KERNEL |