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author | Kishon Vijay Abraham I <kishon@ti.com> | 2015-04-16 17:17:00 +0530 |
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committer | Tom Rini <trini@konsulko.com> | 2015-04-16 15:08:36 -0400 |
commit | 4564faeafbf11feb839e2e3f927be2f1a919ba96 (patch) | |
tree | 7f42f4bce8f16800595e979ad4573dd58e134995 /doc/SPI/README.altera_spi | |
parent | 20913018fbce5a2e3c93b6eeb56e67460e29542c (diff) | |
download | u-boot-imx-4564faeafbf11feb839e2e3f927be2f1a919ba96.zip u-boot-imx-4564faeafbf11feb839e2e3f927be2f1a919ba96.tar.gz u-boot-imx-4564faeafbf11feb839e2e3f927be2f1a919ba96.tar.bz2 |
ti: dwc3: Enable clocks in enable_basic_clocks() in hw_data.c
Commit d3cfcb3 (ARM: DRA7: Enable clocks for USB OTGSS and USB PHY)
changed the member names of prcm_regs from cm_l3init_usb_otg_ss_clkctrl
to cm_l3init_usb_otg_ss1_clkctrl and from cm_coreaon_usb_phy_core_clkctrl
to cm_coreaon_usb_phy1_core_clkctrl in order to differentiate between
the two dwc3 controllers present in dra7xx/am43xx and enabled these
clocks in enable_basic_clocks() in hw_data.c. However these clocks
continued to be enabled in board files/driver files for dwc3 host
mode functionality causing compilation break with few configs.
Fixed it here by making all the clocks enabled in enable_basic_clocks()
and removing it from board files/driver files here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'doc/SPI/README.altera_spi')
0 files changed, 0 insertions, 0 deletions