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author | Codrin Ciubotariu <codrin.ciubotariu@freescale.com> | 2015-01-12 14:08:37 +0200 |
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committer | York Sun <yorksun@freescale.com> | 2015-01-21 09:23:35 -0600 |
commit | 9b478bef27797e0fd2a7673b4b40e7fe14725b26 (patch) | |
tree | cd8c679bc4fe06ca8dd12ac317af02e0153976eb /doc/README.socfpga | |
parent | d9fb29c7e35caea04de69fab6d5aa3725f8ee82d (diff) | |
download | u-boot-imx-9b478bef27797e0fd2a7673b4b40e7fe14725b26.zip u-boot-imx-9b478bef27797e0fd2a7673b4b40e7fe14725b26.tar.gz u-boot-imx-9b478bef27797e0fd2a7673b4b40e7fe14725b26.tar.bz2 |
board/T104xrdb: T1040 FMAN ports FM1@DTSEC1 and FM1@DTSEC2 have no PHYs
Freescale's T1040qds board may be configured to have up to
5 FMAN ports (FM1@DTSEC1 to FM1@DTSEC5). From these 5 ports,
2 of them may be fixed-links (FM1@DTSEC1 annd FM1@DTSEC2),
connected to other two ports from an intergrated
VSC9953 L2 Switch (switch ports 8 and 9). These fixed-link
ports have no PHYs attatched, so they don't have a
corresponding MDIO.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'doc/README.socfpga')
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