diff options
| author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-06-19 15:40:01 +0200 |
|---|---|---|
| committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-06-19 15:40:01 +0200 |
| commit | 448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d (patch) | |
| tree | 022599b68a0e72f34f3f152f4a0056b557a06a44 /doc/README.sbc8560 | |
| parent | f2134f8e9eb006bdcd729e89f309c07b2fa45180 (diff) | |
| parent | 5ffa76a032279bc6d3230b703eda32d13305ba13 (diff) | |
| download | u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.zip u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.tar.gz u-boot-imx-448f5fea4c7dd531b69e4e60eed2a72b89b4ed6d.tar.bz2 | |
Merge branch 'upstream'
Diffstat (limited to 'doc/README.sbc8560')
| -rw-r--r-- | doc/README.sbc8560 | 53 |
1 files changed, 0 insertions, 53 deletions
diff --git a/doc/README.sbc8560 b/doc/README.sbc8560 deleted file mode 100644 index 52592e3..0000000 --- a/doc/README.sbc8560 +++ /dev/null @@ -1,53 +0,0 @@ -The port was tested on Wind River System Sbc8560 board <www.windriver.com>. -U-Boot was installed on the flash memory of the CPU card (no the SODIMM). - -NOTE: Please configure uboot compile to the proper PCI frequency and -setup the appropriate DIP switch settings. - -SBC8560 board: - -Make sure boards switches are set to their appropriate conditions. -Refer to the Engineering Reference Guide ERG-00300-002. Of particular -importance are: 1)Tthe settings for JP4 (JP4 1-3 and 2-4), which -select the on-board FLASH device (Intel 28F128Jx); 2) The settings -for the Clock SW9 (33 MHz or 66 MHz). - - Note: SW9 Settings: 66 MHz - 4:1 ratio CCB clocks:SYSCLK - 3:1 ration e500 Core:CCB - pos1 - on, pos2 - on, pos3 - off, pos4 - on, pos5 - off, pos6 - on - Note: SW9 Settings: 33 MHz - 8:1 ratio CCB clocks:SYSCLK - 3:1 ration e500 Core:CCB - pos1 - on, pos2 - on, pos3 - on, pos4 - off, pos5 - off, pos6 - on - - -Flashing the FLASH device with the "Wind River ICE": - -1) Properly connect and configure the Wind River ICE to the - target JTAG port. This includes running the SBC8560 register script. - Make sure target memory can be read and written. - -2) Build the u-boot image: - make distclean - make SBC8560_66_config or SBC8560_33_config - make CROSS_COMPILE=.../ELDK3.0/ppc_8xx-/ all - - Note: reference is made to the ELDK3.0 compiler but any 85xx cross-compiler - should suffice. - -3) Convert the uboot (.elf) file to a uboot.bin file (using visionClick converter). - The bin file should be converted from fffc0000 to ffffffff - -4) Setup the Flash Utility (tools menu) for: - - Determine the clock speed of the PCI bus and set SW9 accordingly - Note: the speed of the PCI bus defaults to the slowest PCI card - PlayBack the "default" register file for the SBC8560 - Select the uboot.bin file with zero bias - Select the initialize Target prior to programming - Select the V28F640Jx (8192 x 8) 1 device FLASH Algorithm - Select the erase base address from FFFC0000 to FFFFFFFF - Select the start address from 0 with size of 4000 - -5) Erase and Program |