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author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-08-13 16:34:33 +0200 |
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committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-08-13 16:34:33 +0200 |
commit | 375c2c9e57ea5b8d678475379378f4774aa9cb88 (patch) | |
tree | c8499eaec089c8fe7c9eda562131f45b4a7738c6 /doc/README.ppc440 | |
parent | f0d1246ed7cb5a88522244c596d7ae7e6f161283 (diff) | |
parent | 9986bc3e40e899bea372a99a2bca4071bdf2e24b (diff) | |
download | u-boot-imx-375c2c9e57ea5b8d678475379378f4774aa9cb88.zip u-boot-imx-375c2c9e57ea5b8d678475379378f4774aa9cb88.tar.gz u-boot-imx-375c2c9e57ea5b8d678475379378f4774aa9cb88.tar.bz2 |
Merge commit 'upstream/master'
Diffstat (limited to 'doc/README.ppc440')
-rw-r--r-- | doc/README.ppc440 | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/doc/README.ppc440 b/doc/README.ppc440 index 08f34f5..2e04aba 100644 --- a/doc/README.ppc440 +++ b/doc/README.ppc440 @@ -146,12 +146,13 @@ that maps in a single PCI I/O space and PCI memory space. The I/O space begins at PCI I/O address 0 and the PCI memory space is 256 MB starting at PCI address CFG_PCI_TARGBASE. After the pci_controller structure is initialized, the cpu-specific code will -call the routine pci_pre_init() if the CFG_PCI_PRE_INIT flag is -defined. This routine is implemented by board-specific code & is where -the board can over-ride/extend the default pci_controller structure -settings and do other pre-initialization tasks. If pci_pre_init() -returns a value of zero, PCI initialization is aborted; otherwise the -controller structure is registered and initialization continues. +call the routine pci_pre_init(). This routine is implemented by +board-specific code & is where the board can over-ride/extend the +default pci_controller structure settings and exspecially provide +a routine to map the PCI interrupts and do other pre-initialization +tasks. If pci_pre_init() returns a value of zero, PCI initialization +is aborted; otherwise the controller structure is registered and +initialization continues. The default 440GP PCI target configuration is minimal -- it assumes that the strapping registers are set as necessary. Since the strapping bits |