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author | Thomas Chou <thomas@wytron.com.tw> | 2010-05-28 10:56:50 +0800 |
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committer | Scott McNutt <smcnutt@psyent.com> | 2010-05-28 10:56:04 -0400 |
commit | 1117cbf2adac59050af1751af6c6a524afa5c3ef (patch) | |
tree | a53832c1bcea3180e6830e8b3f9cb41adeed2d44 /doc/README.nios_DK | |
parent | 6803336c9f21ba428f5c1b1cf825bbbac0a762e5 (diff) | |
download | u-boot-imx-1117cbf2adac59050af1751af6c6a524afa5c3ef.zip u-boot-imx-1117cbf2adac59050af1751af6c6a524afa5c3ef.tar.gz u-boot-imx-1117cbf2adac59050af1751af6c6a524afa5c3ef.tar.bz2 |
nios: remove nios-32 arch
The nios-32 arch is obsolete and broken. So it is removed.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Diffstat (limited to 'doc/README.nios_DK')
-rw-r--r-- | doc/README.nios_DK | 192 |
1 files changed, 0 insertions, 192 deletions
diff --git a/doc/README.nios_DK b/doc/README.nios_DK deleted file mode 100644 index b119d76..0000000 --- a/doc/README.nios_DK +++ /dev/null @@ -1,192 +0,0 @@ - -=============================================================================== - H A R D W A R E O V E R V I E W -=============================================================================== -===============|===============|===============|===============|=============== - | DK20K200 | DK1C20 | DK1S10 | DK1S40 ----------------|---------------|---------------|---------------|--------------- - | | | | - Schem. Nr. | Nios Dev.Brd. | P06-08713-00 | P06-08468-01 | P06-09178-00 - Rev. | pilot. | 01 | 01 | 00 - Date | 2001/02/06 | 2003/02/20 | 2003/02/14 | 2003/05/14 -[1] | | | | -===============|===============|===============|===============|=============== - | | | | - FPGA | "APEX" | "Cyclon" | "Stratix" | "Stratix" - | EP20K200E | EP1C20 | EP1S10 | EP1S40 - | | | - | (484 FBGA) | (400 FBGA) | (780 FBGA) -[2],[3],[4] | | | ----------------|---------------|---------------|---------------|--------------- - | | - Clock (OSC) | 33.333 MHz | 50 MHz - | | (with ext. supply) - | - | PI49FCT3805 -[5] | ----------------|---------------|---------------|---------------|--------------- - | | - Flash | 1 MByte | 8 MByte - | | - | AM29LV800BB | AM29LV065DU120REI - | 8/16 bit bus | 8 bit bus - | 1 chip | 1 chip -[6],[7] | | ----------------|---------------|---------------|---------------|--------------- - | | | - serial | no such | 4 MBits | no such - Flash | | | - | | EPCS4SI8 | -[8] | | | ----------------|---------------|---------------|---------------|--------------- - | | - Compact | no such, as | see below: prototype adapter - Flash (CF) | module only | - | | ----------------|---------------|---------------|---------------|--------------- - | | - SRAM | 256 KByte | 1 MByte - | | - | IDT71V016S | IDT71V416S10PH - | 32 bit bus | 32 bit bus - | 2 chips | 2 chips - | interlaced | interlaced -[9],[10] | | ----------------|---------------|---------------|---------------|--------------- - | | - SDRAM | SODIMM only | 16 MByte - | | - | | MT48LC4M32B2TG-7 - | 64 bit bus | 32 bit bus - | | 1 chip -[11] | | -===============|===============|===============|===============|=============== - | | - serial I/O | 1 RS232 | 2 RS232 - | | - | LTC1386 | MAX3237CAI - | | - | port 1: | port 1: - | RxD / TxD, | RxD / TxD, - | RTS / CTS | RTS / CTS, DTR / DSR, DCD, RI - | | - | ! ! ! ! ! ! | port 2: | port 2: - | RTS/CTS can | RxD / TxD | RxD / TxD - | be RxD/TxD | | RTS / CTS, DTR / DSR - | of 2nd port | | DCD, RI -[12],[13] | ! ! ! ! ! ! | | ----------------|---------------|---------------|---------------|--------------- - | | - Ethernet | no such, as | 1 10BaseT / 100BaseT - | module only | - | | LAN91C111-NE - | | 32 bit bus - | | no external EEPROM - | | LEDA# for link - | | LEDB# for Rx / Tx -[14] | | -===============|===============|===============|===============|=============== - | | - user | 8 | no such - switches | SW[7..0] | - | | ----------------|---------------|---------------|---------------|--------------- - | - user push | 4 - buttons | PB[3..0] - | ----------------|---------------|---------------|---------------|--------------- - | | - user LEDs | 2 | 8 - | LED[1..0] | LED[7..0] - | | ----------------|---------------|---------------|---------------|--------------- - | - user seven | 2 - segment | HEX[1..0][G..A,DP] - | -===============|===============|===============|===============|=============== - | | - 3.3V proto- | w/o level | no such -- only 5V - type adapter | shift buffer | - | | - | 40 I/O pins | - | 1 card sel. | - | 1 reset out. | - | 1 OSC clock | - | 1 CPU clock | - | 1 clock out. | - | | ----------------|---------------|---------------|---------------|--------------- - | | - 5V prototype | with level | 2 ports -- both card ports supplied with its - adapter | shift buffer | own level shift buffer - | | - | 40 I/O pins | port 1 & 2: - | 1 card sel. | 41 I/O pins - | 1 Vee ? ? ? | 1 card select - | 1 reset out. | 1 reset output (from dev/board) - | 1 OSC clock | 1 OSC clock (from dev/board) - | 1 CPU clock | 1 CPU clock (from dev/board) - | 1 clock inp. | 1 clock input (to dev/board) - | | - | | (special) port 1: - | | 1 CF select - | | 1 CF present - | | 1 CF ATA select - | | 1 CF power - | | - | | NOTE: Both card ports are prepared for raw - | | IDE working. You can connect such - | | devices directly to the 40 pin header. - | | The signal PDIAG (passed diagnostic) - | | is not connected to any I/O signal. - | | Card port 1 is hard wired to the on - | | board Copact Flash adapter together - | | with all other signals needed by CF - | | cards. Hot plug should be working too. -[15],[16] | | -===============|===============|===============|===============|=============== - | | - config. CPLD | EPM7064 | EPM7128 - | | - (alternative | decition by | decision by - FPGA conf.) | jumper | push button - | | - | FPGA config. | FPGA config. | FPGA config. - | from Flash | from Flash | from Flash - | only | and EPCS4 | only - | | | -===============|===============|===============|===============|=============== -=============================================================================== - - -=============================================================================== - R E F E R E N C E S -=============================================================================== -[1] http://www.altera.com/literature/lit-nio.jsp -[2] http://www.altera.com/literature/lit-apx.jsp -[3] http://www.altera.com/literature/lit-cyc.jsp -[4] http://www.altera.com/literature/lit-stx.jsp -[5] http://www.pericom.com/pdf/datasheets/PI49FCT3805.pdf - http://www.pericom.com/products/clock/psempart.php?productID=PI49FCT3805 -[6] http://www.amd.com/us-en/FlashMemory/ProductInformation/0,,37_1447_1623_1468^1532,00.html - http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/21490.pdf -[7] http://www.amd.com/us-en/FlashMemory/ProductInformation/0,,37_1447_1623_1468^1596,00.html - http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/23544b.pdf -[8] http://www.altera.com/literature/lit-config.html - http://preview.altera.com/literature/ds/micron.pdf -[9] http://www.idt.com/products/pages/Asynchronous_SRAMs-71V016SA.html -[10] http://www.idt.com/products/pages/Asynchronous_SRAMs-71V416SL.html -[11] http://www.micron.com/products/dram/sdram/part.aspx?part=MT48LC4M32B2TG-7 -[12] http://www.linear.com/prod/datasheet.html?datasheet=33 - http://www.linear.com/pdf/1386fa.pdf -[13] http://www.maxim-ic.com/quick_view2.cfm/qv_pk/1068/ln/en - http://pdfserv.maxim-ic.com/en/ds/MAX3222-MAX3241.pdf -[14] http://www.smsc.com/main/catalog/lan91c111.html -[15] http://www.t13.org/index.html -[16] http://www.compactflash.org/faqs/faq.htm - - -=============================================================================== -Stephan Linz <linz@li-pro.net> |