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authorpekon gupta <pekon@ti.com>2014-07-18 17:59:42 +0530
committerTom Rini <trini@ti.com>2014-07-25 16:26:12 -0400
commit434f2cfcad9f70231ad5a096325ba72ef0d2a2cc (patch)
tree82a3f5dcec21d63f482868eab003308e5e4ecc3c /doc/README.nand
parent222a3113b46c4a16de3f51747201ca6565c8ee6a (diff)
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ARM: omap: move board specific NAND configs out from ti_armv7_common.h
This patch moves some board specific NAND configs: - FROM: generic config file 'ti_armv7_common.h' - TO: individual board config files using these configs. So that each board can independently set the value as per its design. Following configs are affected in this patch: CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand> CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon> CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon> CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon> This patch also updates documentation for few of above NAND configs. Signed-off-by: Pekon Gupta <pekon@ti.com>
Diffstat (limited to 'doc/README.nand')
-rw-r--r--doc/README.nand12
1 files changed, 12 insertions, 0 deletions
diff --git a/doc/README.nand b/doc/README.nand
index 70cf768..e29188f 100644
--- a/doc/README.nand
+++ b/doc/README.nand
@@ -89,6 +89,10 @@ Commands:
Configuration Options:
+ CONFIG_SYS_NAND_U_BOOT_OFFS
+ NAND Offset from where SPL will read u-boot image. This is the starting
+ address of u-boot MTD partition in NAND.
+
CONFIG_CMD_NAND
Enables NAND support and commmands.
@@ -226,6 +230,14 @@ Platform specific options
detection. However ECC calculation on such plaforms would still be
done by GPMC controller.
+ CONFIG_SPL_NAND_AM33XX_BCH
+ Enables SPL-NAND driver (am335x_spl_bch.c) which supports ELM based
+ hardware ECC correction. This is useful for platforms which have ELM
+ hardware engine and use NAND boot mode.
+ Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+ so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
+ SPL-NAND driver with software ECC correction support.
+
CONFIG_NAND_OMAP_ECCSCHEME
On OMAP platforms, this CONFIG specifies NAND ECC scheme.
It can take following values: