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authorPrabhakar Kushwaha <prabhakar@freescale.com>2012-04-29 23:57:25 +0000
committerAndy Fleming <afleming@freescale.com>2012-07-06 17:30:31 -0500
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powerpc/mpc85xx:NAND_SPL:Avoid IFC/eLBC Base address setting
During NAND_SPL boot, base address and different register are programmed default by corresponding NAND controllers(eLBC/IFC). These settings are sufficient enough for NAND SPL. Avoid updating these register.They will be programmed during NAND RAMBOOT. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
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