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| author | Stefan Roese <sr@denx.de> | 2006-09-07 11:51:23 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2006-09-07 11:51:23 +0200 |
| commit | 887e2ec9ecf49366a60a49b32b73825804909865 (patch) | |
| tree | 341f14d99461653aa75f213933a5669b42f46df9 /doc/README.nand-boot-ppc440 | |
| parent | 0dab03ba8fb20ede7233f497b6c6db188986e7a8 (diff) | |
| download | u-boot-imx-887e2ec9ecf49366a60a49b32b73825804909865.zip u-boot-imx-887e2ec9ecf49366a60a49b32b73825804909865.tar.gz u-boot-imx-887e2ec9ecf49366a60a49b32b73825804909865.tar.bz2 | |
Add support for AMCC Sequoia PPC440EPx eval board
- Add support for PPC440EPx & PPC440GRx
- Add support for PPC440EP(x)/GR(x) NAND controller
in cpu/ppc4xx directory
- Add NAND boot functionality for Sequoia board,
please see doc/README.nand-boot-ppc440 for details
- This Sequoia NAND image doesn't support environment
in NAND for now. This will be added in a short while.
Patch by Stefan Roese, 07 Sep 2006
Diffstat (limited to 'doc/README.nand-boot-ppc440')
| -rw-r--r-- | doc/README.nand-boot-ppc440 | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/doc/README.nand-boot-ppc440 b/doc/README.nand-boot-ppc440 new file mode 100644 index 0000000..a82a10e --- /dev/null +++ b/doc/README.nand-boot-ppc440 @@ -0,0 +1,36 @@ +----------------------------- +NAND boot on PPC440 platforms +----------------------------- + +This document describes the U-Boot NAND boot feature as it +is implemented for the AMCC Sequoia (PPC440EPx) board. + +The PPC440EP(x)/GR(x) cpu's can boot directly from NAND FLASH, +completely without NOR FLASH. This can be done by using the NAND +boot feature of the 440 NAND flash controller (NDFC). + +Here a short desciption of the different boot stages: + +a) IPL (Initial Program Loader, integrated inside CPU) +------------------------------------------------------ +Will load first 4k from NAND (SPL) into cache and execute it from there. + +b) SPL (Secondary Program Loader) +--------------------------------- +Will load special U-Boot version (NUB) from NAND and execute it. This SPL +has to fit into 4kByte. It sets up the CPU and configures the SDRAM +controller and the NAND controller so that the special U-Boot image can be +loaded from NAND to SDRAM. +This special image is build in the directory "nand_spl". + +c) NUB (NAND U-Boot) +-------------------- +This NAND U-Boot (NUB) is a special U-Boot version which can be started +from RAM. Therefore it mustn't (re-)configure the SDRAM controller. + +On 440EPx the SPL is copied to internal SRAM before the NAND controller +is set up. While still running from cache, I experienced problems accessing +the NAND controller. + + +September 07 2006, Stefan Roese <sr@denx.de> |