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| author | Jon Loeliger <jdl@freescale.com> | 2006-08-09 14:41:17 -0500 |
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| committer | Jon Loeliger <jdl@freescale.com> | 2006-08-09 14:41:17 -0500 |
| commit | 92c427b18982167064de454ae5248ec466998919 (patch) | |
| tree | a60a3a9e3f3dec07edf6e6505bfc45c9e0a2dc01 /doc/README.mpc85xxads | |
| parent | 281f69ede28cd3d8be5d62a96b5a0b73e6065858 (diff) | |
| parent | 34c3c0e01dbf1f8cc2bd08de92f2b89ba84921eb (diff) | |
| download | u-boot-imx-92c427b18982167064de454ae5248ec466998919.zip u-boot-imx-92c427b18982167064de454ae5248ec466998919.tar.gz u-boot-imx-92c427b18982167064de454ae5248ec466998919.tar.bz2 | |
Merge branch 'mpc85xx'
Conflicts:
include/ft_build.h
include/pci.h
Resolved, though.
Diffstat (limited to 'doc/README.mpc85xxads')
| -rw-r--r-- | doc/README.mpc85xxads | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/doc/README.mpc85xxads b/doc/README.mpc85xxads index f0cf782..ae8202b 100644 --- a/doc/README.mpc85xxads +++ b/doc/README.mpc85xxads @@ -100,6 +100,9 @@ Updated 13-July-2004 Jon Loeliger SW7[1:4] = 0101 = 5 => 5 x 66 = 330 CCB Sysclk SW7[5:6] = 01 => 5:2 x 330 = 825 Core clock + In order to use PCI-X (only in the first PCI slot. The one with + the RIO connector), you need to set SW1[4] (config) to 1 (off). + Also, configure the board to run PCI at 66 MHz. 2. MEMORY MAP TO WORK WITH LINUX KERNEL |