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authorTom Rini <trini@konsulko.com>2016-02-08 09:48:04 -0500
committerTom Rini <trini@konsulko.com>2016-02-08 09:48:04 -0500
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Spin table in cache
=====================================
As specified by ePAPR v1.1, the spin table needs to be in cached memory. After
-DDR is initialized and U-boot relocates itself into DDR, the spin table is
+DDR is initialized and U-Boot relocates itself into DDR, the spin table is
accessible for core 0. It is part of release.S, within 4KB range after
__secondary_start_page. For other cores to use the spin table, the booting
process is described below: