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| author | Alison Wang <b18965@freescale.com> | 2014-12-09 17:38:23 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-01-23 22:29:14 -0600 |
| commit | 0f5e5579f2b75053e5f05bcba890f7ab2409b460 (patch) | |
| tree | 6ffa4fe667580e96a89ccee7279ee0bc541e1495 /doc/README.mpc85xx-spin-table | |
| parent | dda3b610eee9dcd433627202584ded417327dd51 (diff) | |
| download | u-boot-imx-0f5e5579f2b75053e5f05bcba890f7ab2409b460.zip u-boot-imx-0f5e5579f2b75053e5f05bcba890f7ab2409b460.tar.gz u-boot-imx-0f5e5579f2b75053e5f05bcba890f7ab2409b460.tar.bz2 | |
ls102xa: etsec: Select ge0_clk125 for eTSEC clock muxing as default
This patch reverts to use ge0_clk125 for eTSEC clock muxing. For SAI and
CAN which are pin multiplexed with RGMII1 in EC1 of RCW, ge2_clk125 will
be used via hwconfig.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'doc/README.mpc85xx-spin-table')
0 files changed, 0 insertions, 0 deletions