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| author | Peng Fan <Peng.Fan@freescale.com> | 2015-07-13 11:33:26 +0800 |
|---|---|---|
| committer | Peng Fan <Peng.Fan@freescale.com> | 2015-07-13 11:33:26 +0800 |
| commit | 93e01750558e1ba2a1dfdb0cca24ed38326db091 (patch) | |
| tree | e7ddfaca5ec732296ec5ccfe9db4176dad184b7d /doc/README.mpc83xx.ddrecc | |
| parent | 1f0cbe2b52b1ed7832a2f9c48950522f7b0fb6e8 (diff) | |
| download | u-boot-imx-93e01750558e1ba2a1dfdb0cca24ed38326db091.zip u-boot-imx-93e01750558e1ba2a1dfdb0cca24ed38326db091.tar.gz u-boot-imx-93e01750558e1ba2a1dfdb0cca24ed38326db091.tar.bz2 | |
MLK-11237 imx: mx6qpsabreauto update ddr script to 1.07
Update ddr script to version 1.07:
1. Change MDCCR from default value to 0x24912492,
it will improve DDR duty cycle
2. The MMDC reorder bypass option, which has better DRAM performance
URL:
http://compass.freescale.net/livelink/livelink?func=ll&objId=234335046&objAction=browse&viewType=1
Test Results:
3 boards passed 48 hours memtester stress test.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'doc/README.mpc83xx.ddrecc')
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