summaryrefslogtreecommitdiff
path: root/doc/README.mpc8349emds.ddrecc
diff options
context:
space:
mode:
authorMarian Balakowicz <m8@semihalf.com>2006-03-16 15:19:35 +0100
committerMarian Balakowicz <m8@semihalf.com>2006-03-16 15:19:35 +0100
commitd326f4a242971928ef5a6efb411a604b0478ef1c (patch)
treeb26cef39c5b16de02856182cebee9052a24bfadc /doc/README.mpc8349emds.ddrecc
parent97f98001a325558020128381e1bebf893c811617 (diff)
downloadu-boot-imx-d326f4a242971928ef5a6efb411a604b0478ef1c.zip
u-boot-imx-d326f4a242971928ef5a6efb411a604b0478ef1c.tar.gz
u-boot-imx-d326f4a242971928ef5a6efb411a604b0478ef1c.tar.bz2
Add command for handling DDR ECC registers on MPC8349EE MDS board.
Diffstat (limited to 'doc/README.mpc8349emds.ddrecc')
-rw-r--r--doc/README.mpc8349emds.ddrecc135
1 files changed, 135 insertions, 0 deletions
diff --git a/doc/README.mpc8349emds.ddrecc b/doc/README.mpc8349emds.ddrecc
new file mode 100644
index 0000000..d8edada
--- /dev/null
+++ b/doc/README.mpc8349emds.ddrecc
@@ -0,0 +1,135 @@
+
+
+Use cases for DDR 'ecc' command:
+================================
+
+Before executing particular tests reset target board or clear status registers:
+
+=> ecc captureclear
+=> ecc errdetectclr all
+=> ecc sbecnt 0
+
+
+Injecting Single-Bit Errors
+---------------------------
+
+1. Set 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 1
+
+2. Run test over some memory region
+
+=> ecc test 200000 10
+
+3. Check ECC status
+
+=> ecc status
+...
+Memory Data Path Error Injection Mask High/Low: 00000001 00000000
+...
+Memory Single-Bit Error Management (0..255):
+ Single-Bit Error Threshold: 255
+ Single Bit Error Counter: 16
+...
+Memory Error Detect:
+ Multiple Memory Errors: 0
+ Multiple-Bit Error: 0
+ Single-Bit Error: 0
+...
+
+16 errors were generated, Single-Bit Error flag was not set as Single Bit Error
+Counter did not reach Single-Bit Error Threshold.
+
+4. Make sure used memory region got re-initialized with 0xcafecafe pattern
+
+=> md 200000
+00200000: cafecafe cafecafe cafecafe cafecafe ................
+00200010: cafecafe cafecafe cafecafe cafecafe ................
+00200020: cafecafe cafecafe cafecafe cafecafe ................
+00200030: cafecafe cafecafe cafecafe cafecafe ................
+00200040: cafecafe cafecafe cafecafe cafecafe ................
+00200050: cafecafe cafecafe cafecafe cafecafe ................
+00200060: cafecafe cafecafe cafecafe cafecafe ................
+00200070: cafecafe cafecafe cafecafe cafecafe ................
+00200080: deadbeef deadbeef deadbeef deadbeef ................
+00200090: deadbeef deadbeef deadbeef deadbeef ................
+
+
+Injecting Multiple-Bit Errors
+-----------------------------
+
+1. Set more than 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 5
+
+2. Run test over some memory region
+
+=> ecc test 200000 10
+
+3. Check ECC status
+
+=> ecc status
+...
+Memory Data Path Error Injection Mask High/Low: 00000005 00000000
+...
+Memory Error Detect:
+ Multiple Memory Errors: 1
+ Multiple-Bit Error: 1
+ Single-Bit Error: 0
+...
+
+Observe that both Multiple Memory Errors and Multiple-Bit Error flags are set.
+
+4. Make sure used memory region got re-initialized with 0xcafecafe pattern
+
+=> md 200000
+00200000: cafecafe cafecafe cafecafe cafecafe ................
+00200010: cafecafe cafecafe cafecafe cafecafe ................
+00200020: cafecafe cafecafe cafecafe cafecafe ................
+00200030: cafecafe cafecafe cafecafe cafecafe ................
+00200040: cafecafe cafecafe cafecafe cafecafe ................
+00200050: cafecafe cafecafe cafecafe cafecafe ................
+00200060: cafecafe cafecafe cafecafe cafecafe ................
+00200070: cafecafe cafecafe cafecafe cafecafe ................
+00200080: deadbeef deadbeef deadbeef deadbeef ................
+00200090: deadbeef deadbeef deadbeef deadbeef ................
+
+
+Test Single-Bit Error Counter and Threshold
+-------------------------------------------
+
+1. Set 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 1
+
+2. Enable error injection
+
+=> ecc inject en
+
+3. Let u-boot run for a with Single-Bit error injection enabled
+
+4. Disable error injection
+
+=> ecc inject dis
+
+4. Check status
+
+=> ecc status
+
+...
+Memory Single-Bit Error Management (0..255):
+ Single-Bit Error Threshold: 255
+ Single Bit Error Counter: 60
+
+Memory Error Detect:
+ Multiple Memory Errors: 1
+ Multiple-Bit Error: 0
+ Single-Bit Error: 1
+...
+
+Observe that Single-Bit Error is 'on' which means that Single-Bit Error Counter
+reached Single-Bit Error Threshold. Multiple Memory Errors bit is also 'on', that
+is Counter reached Threshold more than one time (it wraps back after reaching
+Threshold).
+
+