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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-10-16 15:01:15 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /doc/README.m68k
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
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rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'doc/README.m68k')
-rw-r--r--doc/README.m68k54
1 files changed, 27 insertions, 27 deletions
diff --git a/doc/README.m68k b/doc/README.m68k
index 0c533f3..e6c33a7 100644
--- a/doc/README.m68k
+++ b/doc/README.m68k
@@ -72,7 +72,7 @@ For the preloader, please see
http://mailman.uclinux.org/pipermail/uclinux-dev/2003-December/023384.html
U-boot is configured to run at 0x20000 at default. This can be configured by
-change TEXT_BASE in board/m5282evb/config.mk and CFG_MONITOR_BASE in
+change TEXT_BASE in board/m5282evb/config.mk and CONFIG_SYS_MONITOR_BASE in
include/configs/M5282EVB.h.
3.2 BuS EB+MCF-EV123
@@ -95,7 +95,7 @@ If u-boot should be loaded to RAM and started by a pre-loader
CONFIG_MONITOR_IS_IN_RAM must be defined. If it is defined the
initial vector table and basic processor initialization will not
be compiled in. The start address of u-boot must be adjusted in
-the boards config header file (CFG_MONITOR_BASE) and Makefile
+the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile
(TEXT_BASE) to the load address.
4.1 MCF5272 specific Options/Settings
@@ -107,20 +107,20 @@ CONFIG_M5272 -- defined for all Motorola MCF5272 CPUs
CONFIG_MONITOR_IS_IN_RAM
-- defined if u-boot is loaded by a pre-loader
-CFG_MBAR -- defines the base address of the MCF5272 configuration registers
-CFG_INIT_RAM_ADDR
+CONFIG_SYS_MBAR -- defines the base address of the MCF5272 configuration registers
+CONFIG_SYS_INIT_RAM_ADDR
-- defines the base address of the MCF5272 internal SRAM
-CFG_ENET_BD_BASE
+CONFIG_SYS_ENET_BD_BASE
-- defines the base addres of the FEC buffer descriptors
-CFG_SCR -- defines the contents of the System Configuration Register
-CFG_SPR -- defines the contents of the System Protection Register
-CFG_BRx_PRELIM -- defines the contents of the Chip Select Base Registers
-CFG_ORx_PRELIM -- defines the contents of the Chip Select Option Registers
+CONFIG_SYS_SCR -- defines the contents of the System Configuration Register
+CONFIG_SYS_SPR -- defines the contents of the System Protection Register
+CONFIG_SYS_BRx_PRELIM -- defines the contents of the Chip Select Base Registers
+CONFIG_SYS_ORx_PRELIM -- defines the contents of the Chip Select Option Registers
-CFG_PxDDR -- defines the contents of the Data Direction Registers
-CFG_PxDAT -- defines the contents of the Data Registers
-CFG_PXCNT -- defines the contents of the Port Configuration Registers
+CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers
+CONFIG_SYS_PxDAT -- defines the contents of the Data Registers
+CONFIG_SYS_PXCNT -- defines the contents of the Port Configuration Registers
4.2 MCF5282 specific Options/Settings
@@ -132,32 +132,32 @@ CONFIG_M5282 -- defined for all Motorola MCF5282 CPUs
CONFIG_MONITOR_IS_IN_RAM
-- defined if u-boot is loaded by a pre-loader
-CFG_MBAR -- defines the base address of the MCF5282 internal register space
-CFG_INIT_RAM_ADDR
+CONFIG_SYS_MBAR -- defines the base address of the MCF5282 internal register space
+CONFIG_SYS_INIT_RAM_ADDR
-- defines the base address of the MCF5282 internal SRAM
-CFG_INT_FLASH_BASE
+CONFIG_SYS_INT_FLASH_BASE
-- defines the base address of the MCF5282 internal Flash memory
-CFG_ENET_BD_BASE
+CONFIG_SYS_ENET_BD_BASE
-- defines the base addres of the FEC buffer descriptors
-CFG_MFD
+CONFIG_SYS_MFD
-- defines the PLL Multiplication Factor Devider
(see table 9-4 of MCF user manual)
-CFG_RFD -- defines the PLL Reduce Frecuency Devider
+CONFIG_SYS_RFD -- defines the PLL Reduce Frecuency Devider
(see table 9-4 of MCF user manual)
-CFG_CSx_BASE -- defines the base address of chip select x
-CFG_CSx_SIZE -- defines the memory size (address range) of chip select x
-CFG_CSx_WIDTH -- defines the bus with of chip select x
-CFG_CSx_RO -- if set to 0 chip select x is read/wirte
+CONFIG_SYS_CSx_BASE -- defines the base address of chip select x
+CONFIG_SYS_CSx_SIZE -- defines the memory size (address range) of chip select x
+CONFIG_SYS_CSx_WIDTH -- defines the bus with of chip select x
+CONFIG_SYS_CSx_RO -- if set to 0 chip select x is read/wirte
else chipselct is read only
-CFG_CSx_WS -- defines the number of wait states of chip select x
+CONFIG_SYS_CSx_WS -- defines the number of wait states of chip select x
-CFG_PxDDR -- defines the contents of the Data Direction Registers
-CFG_PxDAT -- defines the contents of the Data Registers
-CFG_PXCNT -- defines the contents of the Port Configuration Registers
+CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers
+CONFIG_SYS_PxDAT -- defines the contents of the Data Registers
+CONFIG_SYS_PXCNT -- defines the contents of the Port Configuration Registers
-CFG_PxPAR -- defines the function of ports
+CONFIG_SYS_PxPAR -- defines the function of ports
5. COMPILER