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author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2013-04-23 10:17:47 +0000 |
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committer | Stefano Babic <sbabic@denx.de> | 2013-04-28 11:07:44 +0200 |
commit | eec3f0242df7b96a4dc207515050c20ebaddabb2 (patch) | |
tree | 279f771d6091bfe9aa5f7667446c5bc4f6ab2f4c /doc/README.imx5 | |
parent | 70a5ef2174bfc75942c0c14d2a95164668e71505 (diff) | |
download | u-boot-imx-eec3f0242df7b96a4dc207515050c20ebaddabb2.zip u-boot-imx-eec3f0242df7b96a4dc207515050c20ebaddabb2.tar.gz u-boot-imx-eec3f0242df7b96a4dc207515050c20ebaddabb2.tar.bz2 |
imx: Document fuse assignments for MAC addresses
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Diffstat (limited to 'doc/README.imx5')
-rw-r--r-- | doc/README.imx5 | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/doc/README.imx5 b/doc/README.imx5 index e08941e..c5312b6 100644 --- a/doc/README.imx5 +++ b/doc/README.imx5 @@ -20,3 +20,9 @@ i.MX5x SoCs. This option should be enabled for boards having a SYS_ON_OFF_CTL signal connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the reference designs. + +2. CONVENTIONS FOR FUSE ASSIGNMENTS +----------------------------------- + +2.1 MAC Address: It is stored in the words 9 to 14 of fuse bank 1, using the + natural MAC byte order (i.e. MSB first). |