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authorWolfgang Denk <wd@denx.de>2008-10-18 21:59:44 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:59:44 +0200
commitf82642e33899766892499b163e60560fbbf87773 (patch)
treeab90f076f18e56b2b3e8c9375b95917daa78c1d9 /doc/README.generic_usb_ohci
parentb59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff)
parent360fe71e82b83e264c964c9447c537e9a1f643c8 (diff)
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Merge 'next' branch
Conflicts: board/freescale/mpc8536ds/mpc8536ds.c include/configs/mgcoge.h Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'doc/README.generic_usb_ohci')
-rw-r--r--doc/README.generic_usb_ohci14
1 files changed, 7 insertions, 7 deletions
diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci
index 147ea51..ba7cea8 100644
--- a/doc/README.generic_usb_ohci
+++ b/doc/README.generic_usb_ohci
@@ -11,24 +11,24 @@ Configuration options
CONFIG_USB_OHCI_NEW: enable the new OHCI driver
- CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks:
+ CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks:
- extern int usb_board_init(void);
- extern int usb_board_stop(void);
- extern int usb_cpu_init_fail(void);
- CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
+ CONFIG_SYS_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
- extern int usb_cpu_init(void);
- extern int usb_cpu_stop(void);
- extern int usb_cpu_init_fail(void);
- CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI
+ CONFIG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI
registers
- CFG_USB_OHCI_SLOT_NAME: slot name
+ CONFIG_SYS_USB_OHCI_SLOT_NAME: slot name
- CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the
+ CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the
root hub.
@@ -39,7 +39,7 @@ The USB bus operates in little endian, but unfortunately there are
OHCI controllers that operate in big endian such as ppc4xx and
mpc5xxx. For these the config option
- CFG_OHCI_BE_CONTROLLER
+ CONFIG_SYS_OHCI_BE_CONTROLLER
needs to be defined.
@@ -60,4 +60,4 @@ If undefined, the first instance found in PCI space will be used.
PCI Controllers need to do byte swapping on register accesses, so they
should to define:
- CFG_OHCI_SWAP_REG_ACCESS
+ CONFIG_SYS_OHCI_SWAP_REG_ACCESS