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| author | Wolfgang Denk <wd@denx.de> | 2011-02-02 22:36:10 +0100 |
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| committer | Wolfgang Denk <wd@denx.de> | 2011-02-02 22:36:10 +0100 |
| commit | d1a24f061849ebe4f288d95e8ceb8380f762d323 (patch) | |
| tree | 931fa11d8001abbade00fed6f03ac3a10d12d1c2 /doc/README.fsl-ddr | |
| parent | be9db564de898240034151c48cf9e0d03ece3f35 (diff) | |
| download | u-boot-imx-d1a24f061849ebe4f288d95e8ceb8380f762d323.zip u-boot-imx-d1a24f061849ebe4f288d95e8ceb8380f762d323.tar.gz u-boot-imx-d1a24f061849ebe4f288d95e8ceb8380f762d323.tar.bz2 | |
Minor Coding Style Cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'doc/README.fsl-ddr')
| -rw-r--r-- | doc/README.fsl-ddr | 84 |
1 files changed, 42 insertions, 42 deletions
diff --git a/doc/README.fsl-ddr b/doc/README.fsl-ddr index a7ba193..c1ee0a6 100644 --- a/doc/README.fsl-ddr +++ b/doc/README.fsl-ddr @@ -2,25 +2,25 @@ Table of interleaving modes supported in cpu/8xxx/ddr/ ====================================================== +-------------+---------------------------------------------------------+ - | | Rank Interleaving | - | +--------+-----------+-----------+------------+-----------+ - |Memory | | | | 2x2 | 4x1 | - |Controller | None | 2x1 lower | 2x1 upper | {CS0+CS1}, | {CS0+CS1+ | - |Interleaving | | {CS0+CS1} | {CS2+CS3} | {CS2+CS3} | CS2+CS3} | + | | Rank Interleaving | + | +--------+-----------+-----------+------------+-----------+ + |Memory | | | | 2x2 | 4x1 | + |Controller | None | 2x1 lower | 2x1 upper | {CS0+CS1}, | {CS0+CS1+ | + |Interleaving | | {CS0+CS1} | {CS2+CS3} | {CS2+CS3} | CS2+CS3} | +-------------+--------+-----------+-----------+------------+-----------+ - |None | Yes | Yes | Yes | Yes | Yes | + |None | Yes | Yes | Yes | Yes | Yes | +-------------+--------+-----------+-----------+------------+-----------+ - |Cacheline | Yes | Yes | No | No, Only(*)| Yes | - | |CS0 Only| | | {CS0+CS1} | | + |Cacheline | Yes | Yes | No | No, Only(*)| Yes | + | |CS0 Only| | | {CS0+CS1} | | +-------------+--------+-----------+-----------+------------+-----------+ - |Page | Yes | Yes | No | No, Only(*)| Yes | - | |CS0 Only| | | {CS0+CS1} | | + |Page | Yes | Yes | No | No, Only(*)| Yes | + | |CS0 Only| | | {CS0+CS1} | | +-------------+--------+-----------+-----------+------------+-----------+ - |Bank | Yes | Yes | No | No, Only(*)| Yes | - | |CS0 Only| | | {CS0+CS1} | | + |Bank | Yes | Yes | No | No, Only(*)| Yes | + | |CS0 Only| | | {CS0+CS1} | | +-------------+--------+-----------+-----------+------------+-----------+ - |Superbank | No | Yes | No | No, Only(*)| Yes | - | | | | | {CS0+CS1} | | + |Superbank | No | Yes | No | No, Only(*)| Yes | + | | | | | {CS0+CS1} | | +-------------+--------+-----------+-----------+------------+-----------+ (*) Although the hardware can be configured with memory controller interleaving using "2x2" rank interleaving, it only interleaves {CS0+CS1} @@ -116,57 +116,57 @@ in Ohms. Two slots system +-----------------------+----------+---------------+-----------------------------+-----------------------------+ -| Configuration | |DRAM controller| Slot 1 | Slot 2 | +| Configuration | |DRAM controller| Slot 1 | Slot 2 | +-----------+-----------+----------+-------+-------+--------------+--------------+--------------+--------------+ -| | | | | | Rank 1 | Rank 2 | Rank 1 | Rank 2 | -+ Slot 1 | Slot 2 |Write/Read| Write | Read |-------+------+-------+------+-------+------+-------+------+ -| | | | | | Write | Read | Write | Read | Write | Read | Write | Read | +| | | | | | Rank 1 | Rank 2 | Rank 1 | Rank 2 | ++ Slot 1 | Slot 2 |Write/Read| Write | Read |-------+------+-------+------+-------+------+-------+------+ +| | | | | | Write | Read | Write | Read | Write | Read | Write | Read | +-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | | Slot 1 | off | 75 | 120 | off | off | off | off | off | 30 | 30 | +| | | Slot 1 | off | 75 | 120 | off | off | off | off | off | 30 | 30 | | Dual Rank | Dual Rank |----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | | Slot 2 | off | 75 | off | off | 30 | 30 | 120 | off | off | off | +| | | Slot 2 | off | 75 | off | off | 30 | 30 | 120 | off | off | off | +-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | | Slot 1 | off | 75 | 120 | off | off | off | 20 | 20 | | | +| | | Slot 1 | off | 75 | 120 | off | off | off | 20 | 20 | | | | Dual Rank |Single Rank|----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | | Slot 2 | off | 75 | off | off | 20 | 20 | 120 *| off | | | +| | | Slot 2 | off | 75 | off | off | 20 | 20 | 120 *| off | | | +-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | | Slot 1 | off | 75 | 120 *| off | | | off | off | 20 | 20 | +| | | Slot 1 | off | 75 | 120 *| off | | | off | off | 20 | 20 | |Single Rank| Dual Rank |----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | | Slot 2 | off | 75 | 20 | 20 | | | 120 | off | off | off | +| | | Slot 2 | off | 75 | 20 | 20 | | | 120 | off | off | off | +-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | | Slot 1 | off | 75 | 120 *| off | | | 30 | 30 | | | +| | | Slot 1 | off | 75 | 120 *| off | | | 30 | 30 | | | |Single Rank|Single Rank|----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | | Slot 2 | off | 75 | 30 | 30 | | | 120 *| off | | | +| | | Slot 2 | off | 75 | 30 | 30 | | | 120 *| off | | | +-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| Dual Rank | Empty | Slot 1 | off | 75 | 40 | off | off | off | | | | | +| Dual Rank | Empty | Slot 1 | off | 75 | 40 | off | off | off | | | | | +-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| Empty | Dual Rank | Slot 2 | off | 75 | | | | | 40 | off | off | off | +| Empty | Dual Rank | Slot 2 | off | 75 | | | | | 40 | off | off | off | +-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -|Single Rank| Empty | Slot 1 | off | 75 | 40 | off | | | | | | | +|Single Rank| Empty | Slot 1 | off | 75 | 40 | off | | | | | | | +-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| Empty |Single Rank| Slot 2 | off | 75 | | | | | 40 | off | | | +| Empty |Single Rank| Slot 2 | off | 75 | | | | | 40 | off | | | +-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+ Single slot system +-------------+------------+---------------+-----------------------------+-----------------------------+ -| | |DRAM controller| Rank 1 | Rank 2 | Rank 3 | Rank 4 | +| | |DRAM controller| Rank 1 | Rank 2 | Rank 3 | Rank 4 | |Configuration| Write/Read |-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | | Write | Read | Write | Read | Write | Read | Write | Read | Write | Read | +| | | Write | Read | Write | Read | Write | Read | Write | Read | Write | Read | +-------------+------------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | R1 | off | 75 | 120 *| off | off | off | 20 | 20 | off | off | -| |------------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | R2 | off | 75 | off | 20 | 120 | off | 20 | 20 | off | off | +| | R1 | off | 75 | 120 *| off | off | off | 20 | 20 | off | off | +| |------------+-------+-------+-------+------+-------+------+-------+------+-------+------+ +| | R2 | off | 75 | off | 20 | 120 | off | 20 | 20 | off | off | | Quad Rank |------------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | R3 | off | 75 | 20 | 20 | off | off | 120 *| off | off | off | -| |------------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | R4 | off | 75 | 20 | 20 | off | off | off | 20 | 120 | off | +| | R3 | off | 75 | 20 | 20 | off | off | 120 *| off | off | off | +| |------------+-------+-------+-------+------+-------+------+-------+------+-------+------+ +| | R4 | off | 75 | 20 | 20 | off | off | off | 20 | 120 | off | +-------------+------------+-------+-------+-------+------+-------+------+-------+------+-------+------+ -| | R1 | off | 75 | 40 | off | off | off | +| | R1 | off | 75 | 40 | off | off | off | | Dual Rank |------------+-------+-------+-------+------+-------+------+ -| | R2 | off | 75 | 40 | off | off | off | +| | R2 | off | 75 | 40 | off | off | off | +-------------+------------+-------+-------+-------+------+-------+------+ -| Single Rank | R1 | off | 75 | 40 | off | +| Single Rank | R1 | off | 75 | 40 | off | +-------------+------------+-------+-------+-------+------+ Reference http://www.xrosstalkmag.com/mag_issues/xrosstalk_oct08_final.pdf - http://download.micron.com/pdf/technotes/ddr3/tn4108_ddr3_design_guide.pdf + http://download.micron.com/pdf/technotes/ddr3/tn4108_ddr3_design_guide.pdf |