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| author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2012-09-27 10:22:22 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-15 11:54:11 -0700 |
| commit | 649dc8abd9be85f6de441c3d4d2b7e0588156a38 (patch) | |
| tree | 3d88e367f5a8d6d64fcf9c93371aa30d326982c9 /doc/README.bus_vcxk | |
| parent | 414e1660c8e898539411d92fbacdefc3e6bfbdfb (diff) | |
| download | u-boot-imx-649dc8abd9be85f6de441c3d4d2b7e0588156a38.zip u-boot-imx-649dc8abd9be85f6de441c3d4d2b7e0588156a38.tar.gz u-boot-imx-649dc8abd9be85f6de441c3d4d2b7e0588156a38.tar.bz2 | |
mx5 clocks: Add and use CCSR definitions
This fixes config_pll_clk(), which used 0x20 instead of 0x200 for PLL4_CLOCK.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'doc/README.bus_vcxk')
0 files changed, 0 insertions, 0 deletions