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author | David Feng <fenghua@phytium.com.cn> | 2013-12-14 11:47:35 +0800 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-01-09 16:08:44 +0100 |
commit | 0ae7653128c80a4f2920cbe9b124792c2fd9d9e0 (patch) | |
tree | 14fea7a80e4ea84c7b6a3bc32298daeec55054c7 /doc/README.arm64 | |
parent | 54799e4596bf8af33fd4a8dee153be7011c06d8d (diff) | |
download | u-boot-imx-0ae7653128c80a4f2920cbe9b124792c2fd9d9e0.zip u-boot-imx-0ae7653128c80a4f2920cbe9b124792c2fd9d9e0.tar.gz u-boot-imx-0ae7653128c80a4f2920cbe9b124792c2fd9d9e0.tar.bz2 |
arm64: core support
Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Feng <fenghua@phytium.com.cn>
Diffstat (limited to 'doc/README.arm64')
-rw-r--r-- | doc/README.arm64 | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/doc/README.arm64 b/doc/README.arm64 new file mode 100644 index 0000000..75586db --- /dev/null +++ b/doc/README.arm64 @@ -0,0 +1,46 @@ +U-boot for arm64 + +Summary +======= +No hardware platform of arm64 is available now. The u-boot is +simulated on Foundation Model and Fast Model for ARMv8. + +Notes +===== + +1. Currenly, u-boot run at the highest exception level processor + supported and jump to EL2 or optionally EL1 before enter OS. + +2. U-boot for arm64 is compiled with AArch64-gcc. AArch64-gcc + use rela relocation format, a tool(tools/relocate-rela) by Scott Wood + is used to encode the initial addend of rela to u-boot.bin. After running, + the u-boot will be relocated to destination again. + +3. Fdt should be placed at a 2-megabyte boundary and within the first 512 + megabytes from the start of the kernel image. So, fdt_high should be + defined specially. + Please reference linux/Documentation/arm64/booting.txt for detail. + +4. Spin-table is used to wake up secondary processors. One location + (or per processor location) is defined to hold the kernel entry point + for secondary processors. It must be ensured that the location is + accessible and zero immediately after secondary processor + enter slave_cpu branch execution in start.S. The location address + is encoded in cpu node of DTS. Linux kernel store the entry point + of secondary processors to it and send event to wakeup secondary + processors. + Please reference linux/Documentation/arm64/booting.txt for detail. + +5. Generic board is supported. + +6. CONFIG_ARM64 instead of CONFIG_ARMV8 is used to distinguish aarch64 and + aarch32 specific codes. + +Contributor +=========== + Tom Rini <trini@ti.com> + Scott Wood <scottwood@freescale.com> + York Sun <yorksun@freescale.com> + Simon Glass <sjg@chromium.org> + Sharma Bhupesh <bhupesh.sharma@freescale.com> + Rob Herring <robherring2@gmail.com> |