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| author | Matthew McClintock <msm@freescale.com> | 2012-08-13 10:00:40 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2012-08-23 10:24:17 -0500 |
| commit | 02ea538ce9fa8325f7d15c69cf87c950c5fe1f57 (patch) | |
| tree | 15066f5b6df8b756f4fbb264ccf32522d8e27dbf /doc/README.arm-caches | |
| parent | 8c454047fe9c08a51410dca01b945cdcecb18b7e (diff) | |
| download | u-boot-imx-02ea538ce9fa8325f7d15c69cf87c950c5fe1f57.zip u-boot-imx-02ea538ce9fa8325f7d15c69cf87c950c5fe1f57.tar.gz u-boot-imx-02ea538ce9fa8325f7d15c69cf87c950c5fe1f57.tar.bz2 | |
nand_spl: p1023rds: wait before enabling DDR controller
We have a requirement to wait a period of time before enabling the
DDR controller
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'doc/README.arm-caches')
0 files changed, 0 insertions, 0 deletions