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author | Gabe Black <gabeblack@chromium.org> | 2012-11-03 11:41:24 +0000 |
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committer | Simon Glass <sjg@chromium.org> | 2012-12-06 14:30:41 -0800 |
commit | 32f98735f9ada2bcfb114088f6226be8a22943fa (patch) | |
tree | 005937e3c76bd22e630d257da68e47dac7435725 /doc/README.440-DDR-performance | |
parent | 8313315b9ab3a130784a2a7d0c4f329808690c0b (diff) | |
download | u-boot-imx-32f98735f9ada2bcfb114088f6226be8a22943fa.zip u-boot-imx-32f98735f9ada2bcfb114088f6226be8a22943fa.tar.gz u-boot-imx-32f98735f9ada2bcfb114088f6226be8a22943fa.tar.bz2 |
x86: Reorder x86's post relocation memory layout
This changes the layout in decreasing addresses from:
1. Stack
2. Sections in the image
3. Heap
to
1. Sections in the image
2. Heap
3. Stack
This allows the stack to grow significantly more since it isn't constrained by
the other u-boot areas. More importantly, the generic memory wipe code assumes
that the stack is the lowest addressed area used by the main part of u-boot.
In the original layout, that means that u-boot tramples all over itself. In
the new layout, it works.
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'doc/README.440-DDR-performance')
0 files changed, 0 insertions, 0 deletions