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authorStefan Roese <sr@denx.de>2007-07-06 14:49:28 +0200
committerStefan Roese <sr@denx.de>2007-07-06 14:49:28 +0200
commit461f2274f8d5e15a354ff92648f17c7b2aa76faa (patch)
tree86b6b095749fcb9faca5858fe05b7b991b50bce9 /cpu
parent8e990cb076a1c77daf3a50cc0df9732135e9eef5 (diff)
parente80955f07de03fef0196353e77534b2300193c1c (diff)
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Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'cpu')
-rw-r--r--cpu/ppc4xx/start.S8
1 files changed, 8 insertions, 0 deletions
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index dfe813c..6086b6c 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -1217,15 +1217,23 @@ mck_return:
* NOTE: currently the 440s run with dcache _disabled_ once relocated to DRAM,
* although for some cache-ralated calls stubs have to be provided to satisfy
* symbols resolution.
+ * Icache-related functions are used in POST framework.
*
*/
#ifdef CONFIG_440
.globl dcache_disable
+ .globl icache_disable
+ .globl icache_enable
dcache_disable:
+icache_disable:
+icache_enable:
blr
.globl dcache_status
+ .globl icache_status
dcache_status:
+icache_status:
+ mr r3, 0
blr
#else
flush_dcache: