* Make CPU clock on ICA-IP board controllable by a "cpuclk"

  environment variable which can set to "100", "133", or "150". The
  CPU clock will be configured accordingly upon next reboot. Other
  values are ignored. In case of an invalid or undefined "cpuclk"
  value, the compile-time default CPU clock speed will be used.

* Enable Quad-UART on BMS2003 board (initialize the PCMCIA memory
  window that is used to access the UART registers by the Linux driver)

* Patch by Reinhard Meyer, 20 Dec 2003:
  Fix clock calculation for the MPC5200 for higher clock frequencies
  (above 2**32 / 10 = 429.5 MHz).

2 files changed, 20 insertions, 5 deletions

diff --git a/cpu/mips/incaip_clock.c b/cpu/mips/incaip_clock.c
index 27f0609..4ae06b7 100644
--- a/cpu/mips/incaip_clock.c
+++ b/cpu/mips/incaip_clock.c
@@ -102,3 +102,18 @@ uint incaip_get_fpiclk(void)
 	 break;
    }
 }
+
+int incaip_set_cpuclk(void)
+{
+	uchar tmp[64];
+	ulong cpuclk;
+
+	if (getenv_r("cpuclk", tmp, sizeof(tmp)) > 0)
+	{
+		cpuclk = simple_strtoul(tmp, NULL, 10) * 1000000;
+		ebu_init(cpuclk);
+		cgu_init(cpuclk);
+	}
+
+	return 0;
+}
diff --git a/cpu/mpc5xxx/speed.c b/cpu/mpc5xxx/speed.c
index cb27779..4f4e814 100644
--- a/cpu/mpc5xxx/speed.c
+++ b/cpu/mpc5xxx/speed.c
@@ -30,10 +30,10 @@
 /* Bus-to-Core Multipliers */
 
 static int bus2core[] = {
-	0,  0,  0,  10, 20, 20, 25, 45,
-	30, 55, 40, 50, 0,  60, 35, 0,
-	30, 25, 65, 10, 70, 20, 75, 45,
-	0,  55, 40, 50, 80, 60, 35, 0
+	3, 2, 2, 2, 4, 4, 5, 9,
+	6, 11, 8, 10, 3, 12, 7, 0,
+	6, 5, 13, 2, 14, 4, 15, 9,
+	0, 11, 8, 10, 16, 12, 7, 0
 };
 /* ------------------------------------------------------------------------- */
 
@@ -62,7 +62,7 @@ int get_clocks (void)
 	} else {
 		gd->bus_clk = vco / 4;
 	}
-	gd->cpu_clk = gd->bus_clk * bus2core[val & 0x1f] / 10;
+	gd->cpu_clk = gd->bus_clk * bus2core[val & 0x1f] / 2;
 
 	val = *(vu_long *)MPC5XXX_CDM_CFG;
 	if (val & (1 << 8)) {