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| author | Stefan Roese <sr@denx.de> | 2009-07-14 15:53:08 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-07-24 06:42:31 +0200 |
| commit | 0a371ca08908c9b2a58171223a79bffea1f7c6f5 (patch) | |
| tree | 7103baa810540f83e11850cfa21376f77c7c923f /cpu | |
| parent | 28958b8bea4c66629c5a22fd3c8b0d49df90383d (diff) | |
| download | u-boot-imx-0a371ca08908c9b2a58171223a79bffea1f7c6f5.zip u-boot-imx-0a371ca08908c9b2a58171223a79bffea1f7c6f5.tar.gz u-boot-imx-0a371ca08908c9b2a58171223a79bffea1f7c6f5.tar.bz2 | |
ppc4xx: Fix TLB reset problem with recent 44x images
Patch d873133f [ppc4xx: Add Sequoia RAM-booting target] broke "normal"
booting on some 44x platforms. This breakage is only noticed in some
cases while powercycling. As it seems, the code in question in start.S
didn't invalidate TLB #0. This makes sense since this TLB is used for
the bootrom mapping. With the patch mentioned above even TLB #0 got
invalidated resulting in an error later on.
This patch now fixes this issue by only invalidating TLB #0 in the RAM-
booting case.
Tested succesfully on Sequoia and Canyonlands.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <Eibach@gdsys.de>
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/ppc4xx/start.S | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 582c781..2f06914 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -450,9 +450,14 @@ skip_debug_init: /* Clear all TLB entries -- TID = 0, TS = 0 */ /*----------------------------------------------------------------*/ addis r0,0,0x0000 - li r1,0x003f /* 64 TLB entries */ - mtctr r1 +#ifdef CONFIG_SYS_RAMBOOT li r4,0 /* Start with TLB #0 */ +#else + li r4,1 /* Start with TLB #1 */ +#endif + li r1,64 /* 64 TLB entries */ + sub r1,r1,r4 /* calculate last TLB # */ + mtctr r1 rsttlb: #ifdef CONFIG_SYS_RAMBOOT tlbre r3,r4,0 /* Read contents from TLB word #0 to get EPN */ |