summaryrefslogtreecommitdiff
path: root/cpu
diff options
context:
space:
mode:
authorStefan Roese <sr@denx.de>2008-09-22 15:26:49 +0200
committerStefan Roese <sr@denx.de>2008-09-22 15:26:49 +0200
commit5289feadb7857e2eaf81848aa632afa4a07bc0cc (patch)
treee35f1a35b711e5b2e6a881cfc01feae63b74f0ad /cpu
parent023824549a370bd185d7129d9a6c86f9be7b86a8 (diff)
parent3a9a000d9fba5a127786c8a859d654ba3721917b (diff)
downloadu-boot-imx-5289feadb7857e2eaf81848aa632afa4a07bc0cc.zip
u-boot-imx-5289feadb7857e2eaf81848aa632afa4a07bc0cc.tar.gz
u-boot-imx-5289feadb7857e2eaf81848aa632afa4a07bc0cc.tar.bz2
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'cpu')
-rw-r--r--cpu/sh4/watchdog.c53
1 files changed, 37 insertions, 16 deletions
diff --git a/cpu/sh4/watchdog.c b/cpu/sh4/watchdog.c
index 346e217..f692429 100644
--- a/cpu/sh4/watchdog.c
+++ b/cpu/sh4/watchdog.c
@@ -17,34 +17,55 @@
#include <common.h>
#include <asm/processor.h>
+#include <asm/io.h>
#define WDT_BASE WTCNT
-static unsigned char cnt_read (void){
- return *((volatile unsigned char *)(WDT_BASE + 0x00));
+#define WDT_WD (1 << 6)
+#define WDT_RST_P (0)
+#define WDT_RST_M (1 << 5)
+#define WDT_ENABLE (1 << 7)
+
+#if defined(CONFIG_WATCHDOG)
+static unsigned char csr_read(void)
+{
+ return inb(WDT_BASE + 0x04);
}
-static unsigned char csr_read (void){
- return *((volatile unsigned char *)(WDT_BASE + 0x04));
+static void cnt_write(unsigned char value)
+{
+ outl((unsigned short)value | 0x5A00, WDT_BASE + 0x00);
}
-static void cnt_write (unsigned char value){
- while (csr_read() & (1 << 5)) {
- /* delay */
- }
- *((volatile unsigned short *)(WDT_BASE + 0x00))
- = ((unsigned short) value) | 0x5A00;
+static void csr_write(unsigned char value)
+{
+ outl((unsigned short)value | 0xA500, WDT_BASE + 0x04);
}
-static void csr_write (unsigned char value){
- *((volatile unsigned short *)(WDT_BASE + 0x04))
- = ((unsigned short) value) | 0xA500;
+void watchdog_reset(void)
+{
+ outl(0x55000000, WDT_BASE + 0x08);
}
+int watchdog_init(void)
+{
+ /* Set overflow time*/
+ cnt_write(0);
+ /* Power on reset */
+ csr_write(WDT_WD|WDT_RST_P|WDT_ENABLE);
+
+ return 0;
+}
-int watchdog_init (void){ return 0; }
+int watchdog_disable(void)
+{
+ csr_write(csr_read() & ~WDT_ENABLE);
+ return 0;
+}
+#endif
-void reset_cpu (unsigned long ignored)
+void reset_cpu(unsigned long ignored)
{
- while(1);
+ while (1)
+ ;
}