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authorRyan QIAN <b32804@freescale.com>2011-11-02 10:22:16 +0800
committerRyan QIAN <b32804@freescale.com>2011-11-02 10:22:16 +0800
commit822c9266e666d64f5570c5bfcd4d5460fc635b9e (patch)
tree06956ee46b1536de7dc1a74c0aef75937ab19101 /cpu
parent3dc5c067ea894b909bd6404530e399f90e78b8fe (diff)
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ENGR00139215 iMX61 Uboot support blow fuse
1. add force option to blow operation 2. add blown value check 3. add simple validation for zeros returned by 'simple_strtoul' call Signed-off-by: Ryan QIAN <b32804@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/arm_cortexa8/mx6/generic.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c
index f959b95..11fac50 100644
--- a/cpu/arm_cortexa8/mx6/generic.c
+++ b/cpu/arm_cortexa8/mx6/generic.c
@@ -770,3 +770,27 @@ void ipu_clk_enable(void)
void ipu_clk_disable(void)
{
}
+
+int otp_clk_enable(void)
+{
+ u32 reg = 0;
+
+ reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR2);
+ if (!(reg & 0x3000))
+ reg |= 0x3000;
+ writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR2);
+ return 0;
+}
+
+int otp_clk_disable(void)
+{
+ u32 reg = 0;
+
+ reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR2);
+ if ((reg & 0x3000) == 0x3000)
+ reg &= ~(0x3000);
+ writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR2);
+ return 0;
+}
+
+