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| author | Wolfgang Denk <wd@pollux.denx.de> | 2007-01-30 00:50:40 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-01-30 00:50:40 +0100 |
| commit | f8db84f132b1e335f20f96138a1f09ed97b08664 (patch) | |
| tree | dd31c4563cb6fb067f1d44f64e2ffca7f9b3ec13 /cpu | |
| parent | 6bd2447ee47ee23c18d2b3c7ccd5a20f7626f5b3 (diff) | |
| download | u-boot-imx-f8db84f132b1e335f20f96138a1f09ed97b08664.zip u-boot-imx-f8db84f132b1e335f20f96138a1f09ed97b08664.tar.gz u-boot-imx-f8db84f132b1e335f20f96138a1f09ed97b08664.tar.bz2 | |
LPC2292 SODIMM port coding style cleanup.
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/arm720t/start.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/cpu/arm720t/start.S b/cpu/arm720t/start.S index 96d5f54..8423e4f 100644 --- a/cpu/arm720t/start.S +++ b/cpu/arm720t/start.S @@ -328,13 +328,13 @@ cpu_init_crit: /* Set-up PLL */ mov r3, #0xAA mov r4, #0x55 - /* First disconnect and disable the PLL */ + /* First disconnect and disable the PLL */ ldr r0, PLLCON_ADR mov r1, #0x00 str r1, [r0] ldr r0, PLLFEED_ADR /* start feed sequence */ str r3, [r0] - str r4, [r0] /* feed sequence done */ + str r4, [r0] /* feed sequence done */ /* Set new M and P values */ ldr r0, PLLCFG_ADR mov r1, #0x23 /* M=4 and P=2 */ @@ -349,10 +349,10 @@ cpu_init_crit: ldr r0, PLLFEED_ADR /* start feed sequence */ str r3, [r0] str r4, [r0] /* feed sequence done */ - /* Wait for the lock */ + /* Wait for the lock */ ldr r0, PLLSTAT_ADR mov r1, #0x400 /* lock bit */ -lock_loop: +lock_loop: ldr r2, [r0] and r2, r1, r2 cmp r2, #0 @@ -363,7 +363,7 @@ lock_loop: str r1, [r0] ldr r0, PLLFEED_ADR /* start feed sequence */ str r3, [r0] - str r4, [r0] /* feed sequence done */ + str r4, [r0] /* feed sequence done */ /* Set-up VPBDIV register */ ldr r0, VPBDIV_ADR mov r1, #0x01 /* VPB clock is same as process clock */ |