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authorOlav Morken <olavmrk@gmail.com>2009-01-23 12:56:27 +0100
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2009-02-23 10:34:23 +0100
commitd8f2aa3298610b44127dbc4796d8038aa5847e0b (patch)
tree10a80a2fe35a0a60de1761b1662d2464a9bedc1c /cpu
parentea393eb1d6a786fc2e895f90abb5f7e7541aef45 (diff)
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AVR32: Make cacheflush cpu-dependent
The AT32UC3A series of processors doesn't contain any cache, and issuing cache control instructions on those will cause an exception. This commit makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support. Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com> Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com> Signed-off-by: Olav Morken <olavmrk@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/at32ap/cache.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/at32ap/cache.c b/cpu/at32ap/cache.c
index 16a0565..28b9456 100644
--- a/cpu/at32ap/cache.c
+++ b/cpu/at32ap/cache.c
@@ -22,7 +22,7 @@
#include <common.h>
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
void dcache_clean_range(volatile void *start, size_t size)
{