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authorWolfgang Denk <wd@denx.de>2010-03-12 23:06:04 +0100
committerWolfgang Denk <wd@denx.de>2010-03-12 23:06:04 +0100
commit93910edb595a88d394da3eb2cf5148096155dfe9 (patch)
treefc14bd3093f04c730b5c8d79e57707fada0d6159 /cpu
parent4e72fb15c9073129e05820cc9c54f54bc4985835 (diff)
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Prepare v2010.03-rc1v2010.03-rc1
Coding style cleanup, update CHANGELOG. Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/arm920t/ep93xx/Makefile1
-rw-r--r--cpu/arm_cortexa8/mx51/lowlevel_init.S26
2 files changed, 13 insertions, 14 deletions
diff --git a/cpu/arm920t/ep93xx/Makefile b/cpu/arm920t/ep93xx/Makefile
index 30e12af..01a2f55 100644
--- a/cpu/arm920t/ep93xx/Makefile
+++ b/cpu/arm920t/ep93xx/Makefile
@@ -53,4 +53,3 @@ include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
-
diff --git a/cpu/arm_cortexa8/mx51/lowlevel_init.S b/cpu/arm_cortexa8/mx51/lowlevel_init.S
index 700506e..31af9e2 100644
--- a/cpu/arm_cortexa8/mx51/lowlevel_init.S
+++ b/cpu/arm_cortexa8/mx51/lowlevel_init.S
@@ -33,11 +33,11 @@
mcr 15, 0, r0, c1, c0, 1
/* reconfigure L2 cache aux control reg */
- mov r0, #0xC0 /* tag RAM */
- add r0, r0, #0x4 /* data RAM */
- orr r0, r0, #(1 << 24) /* disable write allocate delay */
- orr r0, r0, #(1 << 23) /* disable write allocate combine */
- orr r0, r0, #(1 << 22) /* disable write allocate */
+ mov r0, #0xC0 /* tag RAM */
+ add r0, r0, #0x4 /* data RAM */
+ orr r0, r0, #(1 << 24) /* disable write allocate delay */
+ orr r0, r0, #(1 << 23) /* disable write allocate combine */
+ orr r0, r0, #(1 << 22) /* disable write allocate */
cmp r3, #0x10 /* r3 contains the silicon rev */
@@ -157,7 +157,7 @@
/* Switch peripheral to PLL 3 */
ldr r0, =CCM_BASE_ADDR
- ldr r1, =0x000010C0
+ ldr r1, =0x000010C0
str r1, [r0, #CLKCTL_CBCMR]
ldr r1, =0x13239145
str r1, [r0, #CLKCTL_CBCDR]
@@ -255,17 +255,17 @@ lowlevel_init:
str r1, [r0, #0x4]
#ifdef ENABLE_IMPRECISE_ABORT
- mrs r1, spsr /* save old spsr */
- mrs r0, cpsr /* read out the cpsr */
- bic r0, r0, #0x100 /* clear the A bit */
- msr spsr, r0 /* update spsr */
- add lr, pc, #0x8 /* update lr */
- movs pc, lr /* update cpsr */
+ mrs r1, spsr /* save old spsr */
+ mrs r0, cpsr /* read out the cpsr */
+ bic r0, r0, #0x100 /* clear the A bit */
+ msr spsr, r0 /* update spsr */
+ add lr, pc, #0x8 /* update lr */
+ movs pc, lr /* update cpsr */
nop
nop
nop
nop
- msr spsr, r1 /* restore old spsr */
+ msr spsr, r1 /* restore old spsr */
#endif
init_l2cc