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authorAnton Vorontsov <avorontsov@ru.mvista.com>2009-02-19 18:20:50 +0300
committerKim Phillips <kim.phillips@freescale.com>2009-02-23 15:52:23 -0600
commit50a4d08e8f31debbd4ea12caf1265f3643c38d5b (patch)
tree078abd6f5ce5c5f91fb838c680c10228e757ef8b /cpu
parenta5878d427128c1a9226045ebe05fbadaa02eb9dd (diff)
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mpc83xx: PCI: Fix hard-coded first_busno value
We should use pci_last_busno() in pci_init_bus(), otherwise we'll erroneously re-use PCI0's first_busno for PCI1 hoses. NOTE: The patch is untested. All MPC83xx FSL boards I have have PCI1 in miniPCI form, for which I don't have any cards handy. But looking in cpu/mpc85xx/pci.c: ... #ifdef CONFIG_MPC85XX_PCI2 hose = &pci_hose[1]; hose->first_busno = pci_hose[0].last_busno + 1; And considering that we do the same for MPC83xx PCI-E support, I think this patch is correct. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc83xx/pci.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mpc83xx/pci.c b/cpu/mpc83xx/pci.c
index 8f5017c..a42b230 100644
--- a/cpu/mpc83xx/pci.c
+++ b/cpu/mpc83xx/pci.c
@@ -91,7 +91,7 @@ static void pci_init_bus(int bus, struct pci_region *reg)
hose->regions[i].size = gd->ram_size;
hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_SYS_MEMORY;
- hose->first_busno = 0;
+ hose->first_busno = pci_last_busno() + 1;
hose->last_busno = 0xff;
pci_setup_indirect(hose, CONFIG_SYS_IMMR + 0x8300 + bus * 0x80,